Analog circuit layout oriented symmetrical constraint extraction method based on graph isomorphism
A technology of analog circuits and extraction methods, which is applied in the fields of electrical digital data processing, special data processing applications, instruments, etc., and can solve the problem of high time complexity of methods
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[0057] The present invention is completed based on the unix workstation Sun v880 of Sun Company.
[0058] Figure 1 is the overall flow chart.
[0059] The devices in the following circuits are MOS transistors M, and the present invention is also applicable to circuits composed of various devices.
[0060] 1. Read the netlist file in Spice format and construct a bipartite graph
[0061] 1) Read the netlist file, and store the device classification into the linked list.
[0062] ●First read the netlist file by line, and judge the nature of the line according to the initial letter of the line:
[0063] ■* indicates a comment line
[0064] The line starting with m / M is the MOS device description line
[0065] The line starting with c / C is the capacitor device description line
[0066] The line starting with r / R is the description line of the resistance device
[0067] ●Read the device name and various parameters in the device description line, and store them in the linked li...
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