Process for producing semiconductor device
A manufacturing method and semiconductor technology, which are applied in the manufacturing of semiconductor/solid-state devices, semiconductor devices, electric solid-state devices, etc., can solve the problems such as the increase of the aspect ratio of the contact hole and the difficulty of filling the contact hole with the adhesive film in the etching of the contact hole.
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no. 1 Embodiment approach
[0088] Next, a first embodiment of the present invention will be described. 2A and FIG. 2B to FIG. 12A and FIG. 12B are cross-sectional views showing in order of steps the method of manufacturing the ferroelectric memory (semiconductor device) according to the first embodiment of the present invention. 13A and FIG. 13B to FIG. 23A and FIG. 23B are cross-sectional views showing the method of manufacturing the ferroelectric memory according to the first embodiment in order of steps. 2A and 2B to 12A and 12B show a cross section perpendicular to the extending direction of the bit line 3, and FIGS. 13A and 13B to 23A and 23B show a cross section perpendicular to the extending direction of the word line 4. 13A to 23A show portions corresponding to two MOS transistors sharing one bit line (corresponding to bit line 3 in FIG. 1 ). 2A to 23A show cross-sections of the memory cell array of the ferroelectric memory, and FIGS. 2B to 23B show cross-sections of logic parts (logic circuit ...
no. 2 Embodiment approach
[0112] Next, a second embodiment of the present invention will be described. 24A and FIG. 24B to FIG. 32A and FIG. 32B are cross-sectional views showing, step by step, a method of manufacturing a ferroelectric memory (semiconductor device) according to the second embodiment of the present invention. However, these figures show a cross section perpendicular to the extending direction of the bit line 3 . 24A to 32A show cross sections of the memory cell array portion of the ferroelectric memory, and FIGS. 24B to 32B show cross sections of the logic portion.
[0113] In the second embodiment, first, as shown in FIGS. 24A and 24B , the processes from the formation of the depressed portion 12 to the formation of the tungsten plug 24 are performed in the same manner as in the first embodiment.
[0114] Then, as shown in FIGS. 25A and 25B , the processes from the formation of the iridium film 25 to the formation of the hard mask 26 are performed in the same manner as in the first em...
no. 3 Embodiment approach
[0125] Next, a third embodiment of the present invention will be described. FIGS. 33A and 33B to FIGS. 43A and 43B are cross-sectional views showing, step by step, the method of manufacturing the ferroelectric memory (semiconductor device) according to the third embodiment of the present invention. However, these figures show a cross section perpendicular to the extending direction of the bit line 3 . 33A to 43A show cross sections of the memory cell array portion of the ferroelectric memory, and FIGS. 33B to 43B show cross sections of the logic portion. 44A and 44B are cross-sectional views perpendicular to the cross-sections shown in FIGS. 43A and 43B , respectively, and show cross-sections perpendicular to the direction in which word lines 4 extend. 44A shows a cross section of a memory cell array portion of a ferroelectric memory, and FIG. 44B shows a cross section of a logic portion.
[0126] In the third embodiment, first, as shown in FIGS. 33A and 33B , as in the firs...
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