Interrupt handling method and interrupt handling apparatus

Abstract

The invention relates to an intermission treating method, which arranges an intermission address register in the intermission controller. Said method comprises: A, writing the initial address of user intermission treating program at present highest priority into the intermission address register, and sending said highest priority intermission request to the CPU inner core; B, CPU inner core reads the address of said intermission address register, and executes the user intermission treating program according to said address. The invention can shorten the time that CPU inner core starts to execute the user intermission treating program, improve the efficiency that CPU inner core treats intermission request, to improve the whole property of SOC. The invention has the same execute time that from the inlet of system intermission treating program to the inlet of each user intermission treating program. And said invention can be used in general CPU inner core and SOC.

Description

technical field [0001] The invention relates to the technical field of interrupt processing, in particular to an interrupt processing method and an interrupt processing device. Background technique [0002] Generally, the central processing unit (CPU) core provides some interrupt request signals. For example, the popular ARM core in the industry provides two kinds of hardware interrupt request signals: common interrupt request (IRQ) and fast interrupt request (FIQ). In a system-on-chip (SOC) with an integrated CPU core, usually more than one user interrupt needs to be processed, so an interrupt controller is required to complete the management of interrupt signals, such as interrupt enable, interrupt mask, interrupt arbitration and other functions. The interrupt controller selects the interrupt signal with the highest priority according to the user's needs and hands it to the CPU core for processing. [0003] refer to figure 1 , The parts involved in interrupt processing i...

AI Technical Summary

Problems solved by technology

Therefore, the above-mentioned method causes a very long time from entering the system interrupt handler to starting to execute the real user interrupt handler, resulting in low efficiency of CPU core processing interrupt application

Moreover, the execution time from the entry of the system interrupt handler to the entry of each user interrupt handler is different, that is, the processing time of different interrupt requests varies greatly

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