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Disorder bit compensation circuit for gradual approaching A/D converter

An analog-to-digital converter, successive approximation technology, applied in the direction of analog-to-digital conversion, code conversion, instruments, etc., can solve the problem of the conversion rate reduction of the analog-to-digital converter, so as to improve the conversion rate, increase the signal-to-noise ratio and Effects of spurious-free dynamic range and shortened charging and discharging time

Inactive Publication Date: 2007-09-12
SOUTHEAST UNIV
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Problems solved by technology

[0003] Technical problem: The object of the present invention is to provide an offset compensation circuit for successive approximation analog-to-digital converters, which solves the problem in the above-mentioned prior art that the conversion of analog-to-digital converters is caused by the increase of the capacitor charging and discharging time constant. To solve the problem of rate reduction, increase the conversion rate of successive approximation analog-to-digital converters

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  • Disorder bit compensation circuit for gradual approaching A/D converter
  • Disorder bit compensation circuit for gradual approaching A/D converter
  • Disorder bit compensation circuit for gradual approaching A/D converter

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Embodiment Construction

[0010] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0011] Referring to Fig. 1, Fig. 1 is a functional block diagram of the present invention. The offset compensation circuit for the successive approximation analog-to-digital converter of the present invention is composed of a comparator output generation circuit 10, an offset compensation generation circuit 20 and an analog-to-digital converter output adjustment circuit 30, wherein the comparator output generation circuit The data input terminal D10 of 10 and the data input terminal D20 of the offset compensation generation circuit 20 are connected to the comparator comparison result signal Din1, the clock input terminal C10 of the comparator output generation circuit 10 and the clock input terminal C20 of the offset compensation generation circuit 20 The first clock signal CLK1 is connected; the output terminal B101 of the comparator...

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Abstract

The invention relates to disorder place compensation circuit which is used for successive approximation type analog to digital converter, belongs to the digital-analog composite signal processing technology area, in the circuit the first inout end of the comparator outputs produce circuit and disorder place compensate produce circuit connects the first clock signal, the second input end of the comparator outputs produce circuit and disorder place compensate produce circuit connects the comparator compare result, the output of the comparator outputs produce circuit and disorder place compensate produce circuit separately corresponding connects the two input ends of the analog to digital converter output adjustment circuit, the clock input end of which connects the second clock signal, and lead out the output data signal and overflow signal of the analog to digital converter from the analog to digital converter output adjustment circuit. The set fuction of the circuit enhances transferring speed of the analog to digital converter, in the meantime, adjustes the output signal through increase compensation place and use the output adjustment circuit, eliminates the error by set in advance and produces the overflow signal.

Description

technical field [0001] The invention relates to an offset compensation circuit for a successive approximation analog-to-digital converter, belonging to the technical field of digital-analog mixed signal processing. Background technique [0002] The successive approximation analog-to-digital converter is one of the most popular high-speed and high-precision analog-to-digital converter structures. In the common successive approximation analog-to-digital converter circuit implemented by a switched capacitor network, the capacitor charging and discharging time is the most important factor. The decisive factor of the conversion rate is that the conversion rate of the analog-to-digital converter decreases due to the increase of the capacitor charging and discharging time constant. Contents of the invention [0003] Technical problem: The object of the present invention is to provide an offset compensation circuit for successive approximation analog-to-digital converters, which s...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/38
Inventor 吴建辉龙善丽王沛茆邦琴张萌李红
Owner SOUTHEAST UNIV
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