QC-LDPC encoder horizontal arithmetic unit fast assembly line cascade connection structure

Abstract

The present invention relates to a horizontal arithmetic unit (HPU) structure for an universal QC-LDPC encoder, which is characterized in that the complex HPU is decoded into a simple basic arithmetic unit (MIN unit) through a cascaded structure. The HPU structure is provided with a streamline structure. An output terminal of each level locks and stores arithmetic results of current level and then sends the results to an input terminal of next level in parallel. Arithmetic output of each level is synchronously sent to an output control unit. According to control information, the control unit selects outputs, thus realizing different functions.

Description

technical field [0001] The invention belongs to the technical field of digital information transmission, and relates to a structure of a horizontal arithmetic unit (HPU) in a QC-LDPC decoder, in particular to a high-speed pipeline cascade structure of the HPU in a general QC-LDPC decoder. technical background [0002] LDPC codes were first proposed by Gallager in 1962 and re-proposed in the 1990s. LDPC code is a special linear block code, and its parity check matrix is ​​sparse. The LDPC code is usually described by its cross-check matrix H, and the nullification space of the check matrix H is the code word space of the LDPC code, and the check matrix H can be specifically described by a Tanner diagram. The number of 1s in each row of the check matrix is ​​called the row weight of the row, and the number of 1s in each column is called the column weight. Generally, LDPC codes with unique row weights and column weights of the check matrix H are called regular LDPC codes, and...

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Problems solved by technology

When implemented by FPGA, such complex operations directly lead to a great increase in operation time, thus restricting the clock frequency of the system

[0038] In addition, in the multi-rate decoder structure, the HPU unit needs to be multiplexed, and the traditional HPU structure cannot satisfy the simple structure of multiple HPU multiplexing operation units.

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