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Multilayer printed wiring board

A multi-layer printing and circuit board technology, applied in the direction of printed circuit, printed circuit, printed circuit manufacturing, etc., can solve the problems of peeling, poor ductility, easy to produce cracks, etc., and achieve the effect of improving the integration rate

Inactive Publication Date: 2008-01-23
IBIDEN CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

It is generally believed that because the electroless plating film formed earlier contains organic matter, hydrogen molecules, hydrogen atoms, etc. and is relatively brittle, cracks are likely to occur on the electroless plating film.
In addition, it is generally believed that since the ductility of the electroless plating film is poor, when a warpage occurs on the printed wiring board when mounting an IC chip or the like, the electroless plating film cannot follow the warpage. Deformed and easy to peel off the land

Method used

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  • Multilayer printed wiring board
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  • Multilayer printed wiring board

Examples

Experimental program
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Effect test

no. 1 Embodiment

[0053]First, the structure of a multilayer printed wiring board 10 according to a first embodiment of the present invention will be described with reference to FIGS. 1 to 8 . FIG. 7 shows a cross-sectional view of the multilayer printed wiring board 10, and FIG. 8 shows a process of mounting an IC chip 90 on the multilayer printed wiring board 10 shown in FIG. state. As shown in FIG. 7 , in the multilayer printed wiring board 10 , a conductor circuit 34 is formed on the surface of the core substrate 30 . The front and back surfaces of the core substrate 30 are connected by through holes 36 . The through hole 36 is composed of cap-shaped plating layers 36a, 36d constituting a via land, and a sidewall conductor layer 36b, and the inside of the sidewall conductor layer 36b is filled with a resin filling material 37. It is also possible to fill only copper without using a resin filler. The interlaminar resin insulating layer 50 and the interlaminar resin insulating layer 150 ar...

no. 2 Embodiment

[0115] First, the structure of a multilayer printed wiring board 10 according to a second embodiment of the present invention will be described with reference to FIGS. 16 and 17 . FIG. 16 shows a sectional view of the multilayer printed wiring board 10, and FIG. 17 shows a process in which an IC chip 90 is mounted on the multilayer printed wiring board 10 shown in FIG. state. As shown in FIG. 16 , in the multilayer printed wiring board 10 , a conductor circuit 34 is formed on the surface of the core substrate 30 . The front and back surfaces of the core substrate 30 are connected by through holes 36 . The through hole 36 is composed of cap-shaped plating layers 36a, 36d constituting a via land, and a sidewall conductor layer 36b, and the inside of the sidewall conductor layer 36b is filled with a resin filling material 37. The interlaminar resin insulating layer 50 and the interlaminar resin insulating layer 150 are disposed on the cap-shaped plating layers (via lands) 36a a...

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Abstract

To provide a multilayer printed wiring board the connection reliability of which does not degraded because a small-diameter via hole is used. [MEANS FOR SOLVING PROBLEMS] A via hole (60A) is formed on a cap plated layer (36a). Most part of the bottom portion is formed in an area other than the area where a through hole (36) is formed. The stress in the vial hole (60A) in a heat cycle is greater than that in a via hole formed in a second interlayer resin insulating layer (150). For the reason, the bottom diameter of the via hole (60A) is made larger than that of the via hole (160).

Description

technical field [0001] The present invention relates to a multilayer printed wiring board, and in particular to a laminated multilayer printed wiring board suitable for use as a package substrate for IC chip mounting. Background technique [0002] In a build-up multilayer printed wiring board constituting a package for an IC chip, an interlayer insulating resin is formed on both sides or one side of a core substrate in which a through-hole is formed by drilling, and is opened by laser or photolithography. A via hole for conducting interlayer conduction forms an interlayer resin insulating layer. On the inner wall of the via hole, a conductive layer is formed by plating or the like, and patterned by etching or the like to produce a conductive circuit. Furthermore, by repeating the operation of forming the interlayer insulating layer and the conductor layer, a build-up multilayer printed wiring board is obtained. In the latest build-up multilayer circuit board, in order to i...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H05K3/46
CPCH05K3/4602H05K2201/09563H05K2201/09627H05K2201/0959H05K2201/0352H05K2201/0347H05K1/115H05K2201/09509H05K2201/096H05K2201/09454H01L2224/16225H01L2924/15311H05K3/46H05K3/42
Inventor 吴有红玉木昌德
Owner IBIDEN CO LTD
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