Etching method and semiconductor device fabrication method

An etching and plasma technology, which is applied in the field of etching polysilicon layer, can solve the problems such as the inability to obtain performance of semiconductor devices, and achieve the effects of suppressing the generation of recesses, improving productivity, and increasing the selectivity ratio

Inactive Publication Date: 2008-04-02
TOKYO ELECTRON LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] If the recess 106 is generated, when the exposed silicon substrate 100 is doped with ions, the ions are not doped in the desired range, and as a result, desired performance cannot be obtained in the semiconductor device.

Method used

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  • Etching method and semiconductor device fabrication method
  • Etching method and semiconductor device fabrication method
  • Etching method and semiconductor device fabrication method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0099] First, the wafer W shown in FIG. 4 is prepared, and the wafer W is loaded into the processing container 11 of the substrate processing apparatus 10, and HBr gas, O 2 gas and Ar gas, set the pressure of processing spaces S1 and S2 to 4.0Pa, supply 2.45GHz microwave to radial line slot antenna 19, and supply 400KHz high-frequency power to susceptor 12, and then pass through the opening The portion of the polysilicon film 37 exposed at 40 is etched to such an extent that only a small portion remains on the gate oxide film 36 . Then, HBr gas and He gas are supplied to the processing space S2, the pressure of the processing spaces S1 and S2 is set to 66.7 Pa, and the remaining polysilicon film is etched by plasma generated from the HBr gas or the like. At this time, it was confirmed that the residual polysilicon film was completely removed, and the gate oxide film 36 was hardly etched.

[0100] Next, the wafer W is carried into the processing container of the wet etching de...

Embodiment 2

[0108] First, under the same conditions as in Example 1, the portion of polysilicon film 37 exposed through opening 40 is etched to such an extent that only a little portion remains on gate oxide film 36 . Furthermore, the remaining polysilicon film was etched under the same conditions as in Example 1 except that the pressure in the processing spaces S1 and S2 was set to 33.3 Pa.

[0109] Then, the gate oxide film 36 exposed due to the complete removal of the residual polysilicon film is removed, and then the antireflection film 38 and the resist film 39 are removed. Afterwards, observing the gate of the wafer W, it can be confirmed that although the silicon substrate 35 slightly produces a recess, the depth of the recess is a depth limit that does not affect the doping of ions into the silicon substrate 35 (see FIG. 7(A)). In addition, it was also confirmed that the shape of the gate oxide film 36 was not expanded at the bottom of the gate.

Embodiment 3

[0111] First, under the same conditions as in Example 1, the portion of polysilicon film 37 exposed through opening 40 is etched to such an extent that only a little portion remains on gate oxide film 36 . Further, under the same conditions as in Example 1 except that the pressure of the processing spaces S1 and S2 was set to 93.3 Pa (700 mTorr), the remaining polysilicon film was etched.

[0112] Then, the gate oxide film 36 exposed due to the complete removal of the residual polysilicon film is removed, and then the antireflection film 38 and the resist film 39 are removed. Afterwards, the gate of the wafer W was observed, and it was confirmed that although no recess was formed on the silicon substrate 35, the shape of the gate oxide film 36 in the gate became a lower spread. The boundary of the lower part of the influence of doping ions into the silicon substrate 35 ( FIG. 7(B) ).

[0113] In Example 3, the pressure of the processing spaces S1 and S2 was set to 93.3 Pa dur...

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PUM

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Abstract

An etching method capable of increasing the selectivity of a polysilicon film to a silicon oxide film and suppressing recess formation on a silicon base layer. That part of the polysilicon film of a wafer transferred into a processing vessel which is exposed through an opening is etched so as to slightly remain on a gate oxide film. The pressure in a processing space is set to 66.7 Pa, HBr gas and He gas are supplied to the processing space, and a microwave of 2.45 GHz is supplied to a radial line slot antenna. The polysilicon film is etched by plasma generated from the HBr gas so as to be completely removed, the exposed gate oxide film is etched, and a resist film and an anti-reflection film are etched.

Description

technical field [0001] The present invention relates to an etching method and a manufacturing method of a semiconductor device, in particular to an etching method for etching a polysilicon layer formed on a gate oxide film. Background technique [0002] In the case of forming a polysilicon (polysilicon) single-layer gate of a semiconductor device, a gate oxide film 101 composed of silicon oxide, a polysilicon film 102, and an antireflection film (BARC) are sequentially formed on a silicon substrate 100. film) 103 and a resist film 104 (see FIG. 8(A)). In this wafer, an antireflection film 103 and a resist film 104 are formed in a predetermined pattern, and openings 105 exposing the polysilicon film 102 are provided at predetermined positions. [0003] The processing procedure of the wafer includes: a main etching (main etching) step and an over etching (over etching) step implemented in a certain chamber as a substrate processing chamber; Oxide film etching step and ashing...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/3065
CPCH01J37/32192H01L21/32137H01L21/3065
Inventor 饭嶋悦夫堀口克己
Owner TOKYO ELECTRON LTD
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