Method of forming STI regions in electronic devices

Abstract

The invention relates to a method of manufacturing integrated circuits and in particular to the step of forming shallow trench isolation (STI) zones. The method according to the present invention leads to electronic devices and to integrated circuits having reduced narrow width effect and edge leakage. This is achieved by performing an extra implantation step near the edge of the STI zone, after formation of the STI zones.

Description

technical field [0001] The present invention relates to a semiconductor process, especially to the manufacture of integrated circuits (ICs), and more particularly to the steps of forming shallow trench isolation (STI) regions. The method of the present invention results in semiconductor devices exhibiting improved parasitic fringe current leakage and narrow width effects. Background technique [0002] In CMOS processes, shallow trench isolation (STI) regions are formed to provide electrical isolation between different devices on a semiconductor substrate. The advantage of this type of isolation is that higher packing densities can be achieved. However, the disadvantages of STI are that transistors can suffer edge leakage caused by oxide thinning, two-dimensional effects of gate control on the channel region, and dopant depletion in this edge region. In addition, when the width of these semiconductor devices is scaled down, the edge leakage leads to the threshold voltage V ...

AI Technical Summary

Problems solved by technology

The first option usually leads to a reduction in packing density, while the latter option has the disadvantage that the implanted dopants are diffused over a larger area during the conventional high temperature step of STI gap filling

[0005] The disadvantage of the method described in US 6,562,697 is that by performing etch-back of the etch-stop layer, not only the sides of the layer are etched, but also the thickness of the layer is reduced

A nitride layer that is too thin may not be a good barrier to additional implants at the edge of the isolation structure in addition to its negative impact on the isolation structure

[0006] Furthermore, the method exhibits the disadvantage that the etch-back of the etch-stop layer implies that the etch-back distance is very difficult to control, and thus the final position of the implanted region is difficult to control

This may be due to large thickness variations of the etch stop layer at different locations on the wafer due to variations in the etch rate within the wafer

Images