Self-reconfigurable on-chip multimedia processing system and its self-reconfiguration realization method

A processing system and multimedia technology, applied in processor architecture/configuration, architecture with a single central processing unit, television, etc., can solve problems such as slow speed and poor flexibility, achieve strong flexibility, fast processing speed, and save hardware resource effect

Active Publication Date: 2008-04-30
SHENZHEN ZHENHUA MICROELECTRONICS
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  • Abstract
  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

[0003] The technical problem to be solved by the present invention is to provide a fast and flexible self-reconfiguration on-chip multimedia processing system and its self-reconfiguration implementation method for the above-mentioned defects of slow speed and poor flexibility in the prior art

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Embodiment Construction

[0041] In the present invention, the process of realizing self-reconfiguration is as follows: First, the hardware structure required for the processing (encoding / decoding) of the multimedia format that may be encountered is divided into a fixed part and a reconfigurable part, wherein the fixed part is in The processing (encoding / decoding) of different formats has the same hardware structure, while the reconfigurable part is processing (encoding / decoding) in different formats. Different hardware structures in the process, for example, functional modules such as DCT coding (discrete cosine coding) and quantization that exist in JPEG and MPEG-1 / 2 format coding, can be divided into fixed parts; and JPEG-specific Functional modules such as huffman coding can be classified as reconfigurable parts as the content of the first configuration file; MPEG-1-specific motion compensation and motion prediction function modules can be classified as reconfigurable parts as the second configurati...

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Abstract

The invention relates to a multimedia-on-wafer self-reconfiguration processing system which includes a processor, a memory and a bus-on-wafer, and also includes a multimedia processing module capable of being reconstructed partly or wholly, a reconstruction configuration file memory, and a reconstruction controller. The reconstruction controller reads a determined configuration file from the reconstruction configuration file memory and reconstructing part or all of the reconfigurable part of the multimedia processing module. The invention provides a method for realizing self-reconfiguration of a system-on-wafer. The method includes reading file head of data; judging whether the file head is matched with the present processing format; reading correspondent reconstruction configuration fileto reconstructing the reconfigurable part; and processing the data and outputting. The inventive multimedia-on-wafer self-reconfiguration processing system and the realizing method thereof has the beneficial effects as following: high processing speed, high convenience, capability for processing various kinds of multimedia signals with one device, capability for realizing time-division multiplexing of hardware, and greatly reduced hardware resource consumption.

Description

technical field [0001] The present invention relates to a multimedia processing system and its realization method, more specifically, to a self-reconfiguration on-chip (SOC system on chip) multimedia processing system and its self-reconfiguration realization method. Background technique [0002] Image and video codecs are widely used in various fields of life such as TV broadcasting, video conferencing, digital cameras, mobile phones, and cameras. In order to meet the real-time and fast requirements, the requirements for the encoder at the image acquisition end and the decoder at the image receiving end are getting higher and higher. There are two main solutions for traditional codecs: one is a software solution, which uses software to implement codec processing. The advantage of this method is that the software has the characteristics of high flexibility, short development cycle, and upgradeability. The disadvantage is that the speed is limited by the main frequency of th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06T1/20G06F15/78H04N7/26H04N19/00
Inventor 朱明程徐渊曹捷田志东
Owner SHENZHEN ZHENHUA MICROELECTRONICS
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