Semiconductor component and its making method

Abstract

The invention discloses a method of manufacturing a semiconductor component, which comprises the steps of forming transistors on a base and generating metal silicide on the surfaces of a grid electrode conductor layer and a source electrode / drain electrode zone; performing surface treatment, in order to form a protection layer on the surface of the metal silicide selectively; and then, using the protection layer as a mask to wipe off partial clearance wall for reducing the width of the clearance wall; and finally forming a stressed layer on the base.

Description

technical field [0001] The present invention relates to an integrated circuit and its forming method, and in particular to a semiconductor element and its forming method. Background technique [0002] In a general semiconductor process, after the metal oxide semiconductor transistor is manufactured, a stress layer is formed on the substrate to increase the mobility of electrons or holes in the channel of the metal oxide semiconductor transistor. In the semiconductor process whose line width is below 65 nanometers, for P-type metal oxide semiconductor transistors, a stress layer with compressive stress (compressive stress) can be formed on the substrate, so that in the P-type metal oxide semiconductor transistors Compressive stress develops along the channel direction. For NMOS transistors, a stress layer with tensile stress can be formed on the substrate to form tensile stress along the channel direction in the NMOS transistors. As the compressive stress or tensile stress ...

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Problems solved by technology

However, during the etching process, the metal silicide layers 22 and 24 are directly exposed to the etching environment without any protection. Therefore, after the etching process, especially after over-etching, the metal silicide layers 22 and 24 will Will be damaged by etching, so that the sheet resistance cannot meet the required

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