Semiconductor device including a superlattice with regions defining a semiconductor junction

Abstract

A semiconductor device may include a superlattice comprising a plurality of stacked groups of layers. Each group of layers of the superlattice may include a plurality of stacked base silicon monolayers defining a base silicon portion and an energy band-modifying layer thereon. The energy band-modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The superlattice may further include at least one pair of oppositely-doped regions therein defining at least one semiconductor junction.

Description

technical field [0001] The present invention relates to the field of semiconductors, and more particularly, the present invention relates to semiconductors with enhanced properties based on energy band engineering and related methods. Background technique [0002] Structures and techniques such as increasing the mobility of carriers have been proposed to improve the performance of semiconductor devices. For example, US Patent Application No. 2003 / 0057416 to Currie et al. discloses a strained material layer of silicon, silicon germanium, and relaxed silicon, and also includes regions free of impurities that would otherwise degrade the performance of the semiconductor. The resulting biaxial strain in the upper silicon layer can alter the mobility of the charge carriers resulting in higher speed devices and / or lower power consumption. Published US Patent Application No. 2003 / 0034529 to Fitzgerald et al. discloses a CMOS inverter based on a similar strained silicon technology. ...

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Problems solved by technology

[0010] Although considerable efforts have been made in materials engineering to increase

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