Encryption-decryption coprocessor for SOC

A coprocessor, encryption and decryption technology, applied in the field of encryption and decryption coprocessor, can solve the problems of increased chip area and power consumption, and achieve the effect of low power consumption and small hardware scale
CN101201811BInactive Publication Date: 2010-05-12边立剑 +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
边立剑
Publication Date
2010-05-12
Estimated Expiration
Not applicable · inactive patent

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Abstract

The invention discloses a coprocessor used for decryption and encryption of an SOC, an accomplishing method and a programming model. A bus interface is connected with a general CPU bus and receives read-write order from the general CPU bus; a central control module is used for controlling the read-write order received by the bus interface and triggering the start, implementation and stop of the corresponding action of the coprocessor; a 256 bits bit processor implements the common data retrieval and hash algorithm in the encryption algorithm and the digital signature algorithm; a DMA controller is connected with a second general CPU bus and conducts data processing under the control of the central control module. The accomplishing method divides various encryption-decryption algorithms into various hardware arithmetic units which are controlled and dispatched by software. The programming model is the description of a register. The invention is more flexible and economic, can realize most known encryption-decryption algorithms and can meet the design requirements of most SOC chips.
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Description

technical field

[0001] The invention relates to a very large-scale digital integrated circuit (VLSI), in particular to an encryption and decryption coprocessor suitable for designing and integrating an SOC (system on a chip) in a very large-scale digital chip. Background technique

[0002] At present, there is no similar patent in this field in China. Foreign patents in this field mostly focus on specific implementations of specific encryption and decryption algorithms (high-speed implementation, low-power implementation, etc.). These patents are characterized by strong specificity and high speed, but a hardware structure can only be used for one or two algorithms (such as DES, RSA, ECC, etc.), which are suitable for very strong real-time requirements.

[0003] At present, most SOC chips in this field use a hardware IP (hardware intellectual property module) or a coprocessor to implement an encryption and decryption algorithm architecture, which leads to an increase in chip...

Claims

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