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Current or voltage measuring circuit, sense circuit, nonvolatile semiconductor memory, and differential amplifier

The technology of a voltage measurement circuit and a differential amplifier, which is applied in another field, can solve the problems of an increase in the number of storage cells, electrical imbalance, mixed with differential noise, etc., and achieve the effect of strong noise resistance and high precision

Inactive Publication Date: 2008-08-06
PANASONIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0016] However, in the nonvolatile semiconductor memory using the folded bit line method for the above-mentioned bit lines, the size of the array increases with the increase in storage capacity, and the number of memory cells corresponding to one sense amplifier increase
Therefore, although the bit line and the reference bit line are closer to each other compared with the conventional open bit line method, the distance between them sometimes reaches about 100 μm as the capacity increases.
In addition, as the distance increases, electrical imbalance occurs or differential noise is mixed in, so that sufficient speed-up and high-sensitivity cannot be achieved.

Method used

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  • Current or voltage measuring circuit, sense circuit, nonvolatile semiconductor memory, and differential amplifier
  • Current or voltage measuring circuit, sense circuit, nonvolatile semiconductor memory, and differential amplifier
  • Current or voltage measuring circuit, sense circuit, nonvolatile semiconductor memory, and differential amplifier

Examples

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Embodiment 1

FIG. 1 is a block diagram showing the structure of a voltage difference measurement circuit 100 according to Embodiment 1 of the present invention. The voltage difference measurement circuit 100 measures the voltage difference between the two output terminals of the device under test 1000 by differentially amplifying the voltage between the two output terminals.

[0048] Specifically, the voltage difference measurement circuit 100 as shown in FIG. 1 includes a differential amplifier 110 and a pair of wirings 120 .

[0049] The differential amplifier 110 amplifies the voltage difference of the input signal and outputs it. In this embodiment, the gain (A) of the differential amplifier 110 is set to 1. In addition, a node (node) to which a positive phase (high side) voltage of the differential amplifier 110 is input is referred to as VH, and a node to which a negative phase (negative phase) side (low side) voltage is input is referred to as VH. for VL.

[0050] The pair of wiri...

Embodiment 2

FIG. 2 is a block diagram showing the structure of a readout circuit 200 according to Embodiment 2 of the present invention. The readout circuit 200 is an example in which the voltage difference measurement circuit 100 involved in the first embodiment is applied to a readout circuit in a storage circuit.

[0062] The read circuit 200 reads information stored in the memory cell 2000 (M0, M1 in FIG. 2). This memory cell 2000 is a nonvolatile memory in which a cell current of a read cell changes according to written information. In this embodiment, for convenience of description, it is assumed that a prescribed read current flows when "1" is stored as information, and that current does not flow when "0" is stored as information.

[0063] As shown in FIG. 2 , readout circuit 200 is configured to include differential amplifier 110 , a pair of wiring lines 220 , selection transistors 230 a and 230 b , precharge switch 240 , reset switch 250 , and differential amplifier 260 . In add...

Embodiment 3

FIG. 4 is a block diagram showing the structure of a readout circuit 300 according to Embodiment 3 of the present invention. As shown in FIG. 4 , the readout circuit 300 includes a pull-up resistor 340 (RL) and a pull-down resistor 350 (RL′). The pull-up resistor 340 (RL) replaces the precharge switch 240 in Embodiment 2, and the pull-down resistor 350 (RL′) replaces the reset switch 250 . In the readout circuit 200 involved in the second embodiment, the state of the memory cell is judged through dynamic operation, and in this embodiment, the state of the memory cell is judged according to whether there is a state of "0" or "1" in the memory cell current to read data.

[0078] In the readout circuit 300 configured as described above, when information is read from the memory cell 2000 , a voltage drop and a voltage rise occur in the pull-up resistor 340 and the pull-down resistor 350 . As a result, the voltages of the high-side and low-side nodes of the differential amplifier ...

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Abstract

In pair wiring (120) comprising a first signal line (120a) and a second signal line (120b), the first signal line (120a) and the second signal line (120b) are laid out so that their stray capacitances are substantially equal. Two output terminals of an element (1000) to be measured and input terminals of a differential amplifier (110) are connected by the pair wiring (120). As a result, the noise contained in the first signal line (120a) and the noise contained in the second signal line (120b) become in-phase noise which is cancelled by the differential amplification of the differential amplifier (110).

Description

technical field [0001] The present invention relates to a voltage measuring circuit for measuring the voltage between two terminals of the measured object, a current flowing into one of the two terminals of the measured object or a current flowing from the two terminals of the measured object A current measurement circuit for measuring the current flowing from another terminal, a readout circuit for reading information stored in a memory cell, and an invention of a nonvolatile semiconductor memory. Background technique [0002] The non-volatile semiconductor memory is developing toward the direction of refinement and large capacity. However, in a nonvolatile semiconductor memory, fineness following a scaling law cannot be achieved, and the cell current in the smallest cell keeps decreasing. Therefore, a high-speed and high-sensitivity memory cell reading method is sought in a nonvolatile semiconductor memory. [0003] Also, due to the decrease in cell current and the expe...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/06G11C16/04
Inventor 小岛诚圆山敬史
Owner PANASONIC CORP
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