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Method of manufacturing a semiconductor device with an isolation region and a device manufactured by the method

A technology of semiconductors and devices, applied in the field of isolating semiconductor devices

Active Publication Date: 2011-03-30
NXP BV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0014] In addition, the above two methods are not compatible with Philips ABCD process

Method used

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  • Method of manufacturing a semiconductor device with an isolation region and a device manufactured by the method
  • Method of manufacturing a semiconductor device with an isolation region and a device manufactured by the method
  • Method of manufacturing a semiconductor device with an isolation region and a device manufactured by the method

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Embodiment Construction

[0057] A first embodiment of a method of manufacturing a semiconductor device according to the present invention will be described with reference to FIGS. 1-9.

[0058] First, a silicon semiconductor substrate 10 with a thin SiGe buried epitaxial layer 12 and an upper silicon epitaxial layer 14 is provided. Since in the final device components such as transistors are formed in upper layer 14 , this layer is referred to as device layer 14 . In an embodiment, the SiGe layer 12 contains 25% Ge and has a thickness of 20 nm, and the upper silicon layer 14 has a thickness of 300 nm. In alternative embodiments, any suitable material and thickness are possible, for example, the thickness of the buried layer can be from 10 nm to 100 nm, and the thickness of the upper device layer can be from 100 nm to 10 μm.

[0059] As shown in FIG. 2, a pair of insulating layers are formed on the epitaxial layer, including a thin oxide layer 16 with a thickness of 10 nm and a nitride layer 18 with a...

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Abstract

A method of manufacturing a semiconductor device includes forming trench isolation structures, exposing some of the trench isolation structures 28 to leave others 30 masked, and then selectively etching a buried layer to form a cavity 32 under an active device region 34. The active device region 34 is supported by support regions in the exposed trenches 28. The buried layer may be a SiGe layer ona Si substrate.

Description

technical field [0001] The present invention relates to a method of manufacturing a semiconductor with an isolation region and a semiconductor device manufactured by the method, in particular, it does not exclude a method of isolating a region of a semiconductor device, which can be integrated into a standard CMOS process and corresponding devices. Background technique [0002] It is often required to isolate discrete devices on separate semiconductor substrates from each other. [0003] A specific example of this need is the integration of high power and / or high voltage devices with logic or analog circuits. Typically, these power integrated circuits use buried buried layers or multi-well implants (vertical isolation) in combination with shallow trench isolation (STI) structures or deep trench isolation (DTI) structures. [0004] Such devices are affected by parasitic effects such as bipolar transistor switching, latch-up, and substrate minority carrier injection. This t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/762
CPCH01L21/76264H01L21/76283H01L21/76224H01L21/762H01L27/1207H01L29/0649H01L29/267
Inventor 简·雄斯基
Owner NXP BV