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LDPC decoding circular hierarchical minimum calculation method and its realization device

A calculation method and minimum value technology, applied in the field of digital information transmission, can solve problems such as limiting the working speed of LDPC decoders, restricting the throughput performance of decoders, and complex minimum value calculations, so as to improve the working clock frequency and throughput rate , simple structure, and the effect of reducing hardware resource consumption

Inactive Publication Date: 2008-09-17
TSINGHUA UNIV
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AI Technical Summary

Problems solved by technology

[0050] The technical problem to be solved by the present invention is that in the HPU structure traditionally used in the existing LDPC decoder, the calculation of its minimum value is complicated, which makes the HPU structure complicated, the critical path is long, and the delay is large, which limits the LDPC The working speed of the decoder restricts the throughput performance of the decoder

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  • LDPC decoding circular hierarchical minimum calculation method and its realization device
  • LDPC decoding circular hierarchical minimum calculation method and its realization device
  • LDPC decoding circular hierarchical minimum calculation method and its realization device

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specific Embodiment approach

[0133] refer to Figure 5 , representing another embodiment as the implementation device, is a structure diagram of the implementation device based on the cyclical hierarchical minimum calculation method of the 3-input minimum calculation module, and the device is used to complete the minimum calculation in the HPU of the λ input. Among them, the min module represents the minimum value calculation module of 3 inputs. For the convenience of explanation, each min module in the figure is identified by two subscripts, the first subscript indicates the classification of the module, and the second subscript indicates the The number of the module in its hierarchy. The minimum value calculated by each module is marked above each minimum value module in the figure. Minimum calculation device based on 3-input minimum calculation module, including Each level consists of λ 3-input minimum calculation modules. The specific implementation of each classification is as follows:

[0134] ...

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Abstract

A method for calculating the least value of the circulating grading to the LDPC decoding and a realizing device thereof belong to the field of the digital information transmission technique. The method uses a fundamental least value calculating module which is composed of a comparator and a selector, and realizes the least value calculation of the horizontal calculating unit in the low-density check code encoder basing on the least summation algorithm and the improved algorithm. The designing process of the low-density check code encoder can be simplified, and the consumption quantity of the logical resource of the horizontal arithmetic unit in the encoder can be reduced. The least value calculating method basing on the invention and the realizing device thereof has the advantages of directly designing out the horizontal arithmetic unit of the production line, decomposition to the time delay path of the horizontal arithmetic unit, increase to the clock frequency of the encoder and increase to the capability of the turnover rate of decoding.

Description

technical field [0001] The invention belongs to the technical field of digital information transmission, and in particular relates to a cyclical hierarchical minimum calculation method for LDPC decoding in communication and broadcasting systems and a realization device thereof. Background technique [0002] The LDPC, that is, Low-density parity-check, low-density parity check, abbreviated as LDPC, this decoding was first proposed by Gallager in 1962 (Robert G. Gallager, "Low-density parity-check codes," IRE Transaction on Information Theory, IT-18, pp.21-28, Jan.1962), because the calculation of its encoding and decoding was very complicated relative to the processing capabilities of electronic devices at that time, it did not attract people's attention until the 1990s, and because of its outstanding Coding performance, more and more widely used in communication and broadcasting systems and standards. As a linear block code, the LDPC code is described by its check matrix H,...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M13/11H04L1/00
Inventor 彭克武江南杨知行符剑张彧阳辉
Owner TSINGHUA UNIV
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