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Method and system for real time synthesizing multi-tap CCD output image data

A technology of image data and synthesis method, applied in image communication, TV system scanning details, TV system components and other directions, can solve the problems of high cost, inability to disrupt and adjust, complex system structure and data processing process, etc. The effect of low cost, simple system structure and processing method

Inactive Publication Date: 2008-12-24
XI'AN INST OF OPTICS & FINE MECHANICS - CHINESE ACAD OF SCI
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  • Abstract
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  • Application Information

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Problems solved by technology

When resynthesizing images, external devices must participate in the processing, such as CPU, so this synthesis method has the following disadvantages: data must be first in first out, cannot be accessed randomly, and cannot be disturbed and adjusted, and the system structure and data processing process are complicated and costly. high

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  • Method and system for real time synthesizing multi-tap CCD output image data
  • Method and system for real time synthesizing multi-tap CCD output image data

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Embodiment Construction

[0019] Method concrete steps of the present invention are as follows:

[0020] 1) Collect the pixel data output by the CCD taps, and write the pixel data into the dual-port RAM by the corresponding dual-port RAM write-in terminal according to the output order of the CCD taps;

[0021] 2) set up a writing address generator, write the pixel data of dual-port RAM into the corresponding writing address in the writing address generator;

[0022] 3) A readout address generator is set up, and according to the required image data output sequence, the readout address generator uniformly addresses the write addresses and chip select signals of all dual-port RAMs;

[0023] 4) the address and the chip select signal of the dual-port RAM after addressing are used as the read-out address of the dual-port RAM;

[0024] 5) Connect the corresponding readout data lines of all dual-port RAMs together, read out the pixel data from the readout address in sequence according to the addressing sequen...

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Abstract

The invention relates to a multi-tap CCD output image data real-time synthetic method and a system. The method comprises the following steps: 1) pixel data output by CCD taps is collected to be written into a dual-port RAM; 2) a writing address generator is established, and the pixel data of the dual-port RAM is written into the corresponding address; 3) a reading address generator is established, all the writing addresses of the dual-port RAM and a chip select signal are subjected to the uniform addressing by the reading address generator; 4) the address of the dual-port RAM and the chip selection signal after the addressing are taken as a read address of the dual-port RAM; 5) all the corresponding read data lines of the dual-port RAM are connected together, the pixel data is sequentially read from the read address according to the addressing sequence and the required image data is synthesized. The invention provides the multi-tap CCD output image data real-time synthetic method and the system with low cost and simple realization process for solving the technical problems in the background technology.

Description

technical field [0001] The invention relates to a method and system for synthesizing image data, in particular to a method and system for synthesizing real-time image data output by a multi-tap CCD. Background technique [0002] For high-speed frame-transfer CCD sensors, because the exposure period is very short, to output image signals in a very short time, it is necessary to increase the frame transfer rate and pixel clock, which brings great challenges to the chip manufacturing process and the design of peripheral drive circuits. difficult, and the signal-to-noise ratio will deteriorate. In order to alleviate this situation, chip manufacturers have adopted a multi-head output design, which divides the photosensitive area and storage area of ​​the CCD into multiple blocks, each with its own output port, and multi-port parallel output. In this way, the frame transfer rate and output pixel clock are greatly reduced. However, it is still necessary to synthesize multiple sig...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N3/15H04N5/335H04N25/00
Inventor 李长乐李自田刘学斌皮海峰王忠厚
Owner XI'AN INST OF OPTICS & FINE MECHANICS - CHINESE ACAD OF SCI