Preparation method of CuxO resistor random memory
A random access memory and resistance storage technology, applied in the field of memory, can solve the problems of poor low-resistance state retention performance, unstable operating voltage, and thermal instability of low-resistance state, so as to improve storage performance, stabilize operating voltage, cost low effect
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specific Embodiment 1
[0020] figure 1 Shown is the Cu formed by the method of this embodiment x Cross-sectional structure diagram of O-resistive memory. Such as figure 1 As shown, 10a is a silicon substrate, and 10b is a Cu thin film substrate as the lower electrode. 11b is surface-active treated Cu x O resistance storage medium layer, Cu x The O resistance storage medium layer is formed on the Cu film, which can be formed by thermal oxidation, plasma oxidation, chemical oxidation, reactive sputtering or physical sputtering. 12 is the upper electrode, which can be a metal, or a non-stoichiometric compound corresponding to the metal, including but not limited to Ta, Ti, Ni, Zn, Ru, Cu, In, Ir, Al, and non-stoichiometric compounds corresponding to these metals. Nitride or oxide with stoichiometric ratio can be formed by physical sputtering, chemical reaction sputtering, physical vapor deposition, chemical vapor deposition and other methods.
[0021] Next, specific process steps of this embodime...
specific Embodiment 2
[0027] Figure 7 Shown is a cross-sectional structure diagram of the CuxO resistance memory formed by the method of this embodiment. The CuxO resistance memory is integrated between the first layer of copper wiring and the second layer of wiring, and the CuxO is formed on the first copper wire. However, the present invention is not limited to this embodiment. Such as Figure 7 As shown, the lower part is shown as a schematic diagram of the CuxO resistance memory structure integrated in the double Damascus copper interconnection process. The PMD layer 104 is formed on the MOS device. It can be dielectric materials such as phosphorus-doped silicon oxide PSG, in the PMD A tungsten plug 903 is formed in the layer 104, and the tungsten plug 903 is connected to the copper lead of the first layer and the source or drain of the MOS transistor. Form the first etch stop layer 201 on the PMD layer 104, can be Si 3 N 4 , SiON, SiCN; the first interlayer dielectric layer 101 is formed...
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