Semiconductor package substrate and fabrication method thereof
A technology for packaging substrates and manufacturing methods, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., and can solve the problems of reduced metal wire bonding capabilities, waste of manufacturing time, and problems with the bonding degree of wire bonding To achieve the effect of maintaining electrical quality, reducing cost and waste of time
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[0040] The implementation of the present invention is described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various modifications and changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.
[0041] Please refer to Figures 2A to 2F , is a cross-sectional view of the manufacturing method of the semiconductor package substrate of the present invention. However, the drawings described are simplified schematic diagrams. The icons only show the components related to the present invention, and the components shown are not the actual implementation. The number and shape of the components in the actual implementation are a selecti...
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