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Nanocrystalline floating gate memory of multi-medium composite tunnel layer and manufacturing method

A fabrication method and tunneling layer technology, applied in the field of microelectronics, can solve the problems of difficult process control, poor compatibility, low fabrication efficiency, etc.

Inactive Publication Date: 2009-03-11
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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Problems solved by technology

[0016] However, the preparation of nanocrystalline particles by the above method generally has the disadvantages of complex production process, high production cost, low production efficiency, or large nanocrystalline particles, or difficult process control during the production process, or poor feasibility and poor compatibility with traditional CMOS processes.

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  • Nanocrystalline floating gate memory of multi-medium composite tunnel layer and manufacturing method

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[0089] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0090] Such as figure 1 as shown, figure 1 A schematic structural diagram of the nanocrystalline floating gate memory of the multi-media composite tunneling layer provided by the present invention, the nanocrystalline floating gate memory of the multi-media composite tunneling layer includes: a silicon substrate 1, a heavily doped source on the silicon substrate SiO covered on the carrier channel between the conductive region 8 and the drain conductive region 9, and the source-drain conductive region 2 Material Dielectric 2 / High-k Material Dielectric 3 / High-k or SiO 2 Material medium 4 composite tunneling layer, nanocrystalline floating gate layer 5 covered on the composite tunneling layer, high-k material or SiO covere...

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Abstract

The invention discloses a nanocrystal floating gate memory with a multimedia composite tunneling layer, which belongs to the technical field of the micro-electronics. The nanocrystal floating gate memory comprises a silicon substrate, a source conductive area and a drain conductive area which are heavily doped on the silicon substrate, a SiO2 material medium / high k material medium / high k or SiO2 material medium composite tunneling layer covered on a current carrier channel between the source conductive area and the drain conductive area, a nanocrystal floating gate layer covered on the composite tunneling layer, a high k material or SiO2 material control gate dielectric layer covered on the nanocrystal floating gate layer, and a gate material layer covered on the control gate dielectric layer. The invention also discloses a fabricating method for the nanocrystal floating gate memory with the multi-media composite tunneling layer. The invention comprehensively improves the memory performance of the floating gate memory, improves the programming / erasing speed, enhances the tolerance and the data retention, reduces the programming / erasing voltage and the operating power consumption, compromises the contradiction between the programming / erasing efficiency and the data retention, improves the integration level and has simple fabricating process.

Description

technical field [0001] The invention relates to the technical field of microelectronics, in particular to a nanocrystal floating gate memory of a multi-media composite tunneling layer and a manufacturing method thereof. Background technique [0002] Floating gate structure memory is a mainstream memory type widely used and generally recognized at present. It is a very important semiconductor component and is widely used in the electronics and computer industries. Due to the requirements of its own structure and material selection, the traditional floating gate memory has the limitations of the conflict between fast write / erase operations and long-term high-stability storage, and as the technology node shrinks, this contradiction does not disappear Obvious improvement, and then limit the development of floating gate memory. [0003] As the feature size enters the nanometer level, how to adapt to the development of the process and improve the performance of writing, reading, ...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/788H01L29/51H01L29/49H01L27/115H01L21/336H01L21/28H01L21/8247H10B69/00
Inventor 胡媛刘明龙世兵杨清华管伟华李志刚
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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