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System for initially generating stabilized in-chip clock

A technology for initializing and stabilizing chips, applied in the directions of signal generation/distribution, automatic power control, electrical components, etc., which can solve the problems of increasing process costs and expensive test steps, reducing costs, simplifying the trimming process, and avoiding the test environment. Effects of use with test equipment

Active Publication Date: 2010-06-16
PHICOMM (SHANGHAI) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The traditional technology also uses hardware / software trimming of the on-chip oscillator to achieve a more accurate clock, but expensive test instruments and complicated test steps are required. In addition, hardware trimming also increases the process cost.

Method used

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  • System for initially generating stabilized in-chip clock
  • System for initially generating stabilized in-chip clock
  • System for initially generating stabilized in-chip clock

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0021] like Figure 1-2 As shown, a system for initializing and generating a stable on-chip clock includes a chip provided with an automatic clock-locking-configuration integrated circuit IP, a crystal oscillator clock source, a non-volatile memory, and a light-emitting diode. The automatic clock-locking-configuration integration The circuit IP includes a phase detector, a charge pump, an analog-to-digital converter, a register, a digital-to-analog converter, a current / voltage control oscillator and a frequency lock detection circuit, the crystal oscillator clock source is connected to one end of the phase detector, and the phase detector The output of the device is connected to the input of the charge pump, the output of the charge pump is connected to the input of the analog-to-digital converter, the output of the analog-to-digital converter is connected to the input of the register, and the register is also connected to the digital-to-analog converter and the non-volatile me...

Embodiment 2

[0031] This solution is a PCB version-level application solution that uses clock automatic locking-configuration integrated circuit IP to complete initialization and generate stable on-chip clock.

[0032] like image 3 As shown, a specific initialization circuit:

[0033] The crystal reference clock f_ref and the feedback clock f_back are input to the phase detector as two input signals, and the phase detector outputs the two signals to the charge pump, the charge pump outputs the signal to the analog-to-digital converter, and the analog-to-digital converter outputs the signal to DFF data input, feedback clock f_back output to DFF clock input, DFF stores the conversion result of the analog-to-digital converter on each rising edge of the feedback clock f_back and outputs it to the digital-to-analog converter, and the output current of the digital-to-analog converter is used as a capacitor charging and discharging network Charge / discharge current, capacitor charge and discharg...

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PUM

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Abstract

The invention discloses a system for generating on chip clock of a stabilizer fin through initialization, which comprises a chip provided with a clock automatic locking - integrated circuit configuration IP, a crystal oscillation clock source, a nonvolatile memory and a light-emitting diode, wherein the clock automatic locking - integrated circuit configuration IP comprises a phase discriminator,a charge pump, an analog-to-digital converter, a register, a digital-to-analog converter, a current / voltage controlled oscillator and a frequency locking detection circuit; the crystal oscillation clock source is connected with the input at one end of the phase discriminator; the phase discriminator, the charge pump, the analog-to-digital converter and the register are connected in turn; the register is also connected with the digital-to-analog converter and the nonvolatile memory; and the output of the digital-to-analog converter is connected with the input of the current / voltage controlled oscillator, and the output of the current / voltage controlled oscillator is connected with the input on the other end of the phase discriminator, so as to form a circuit; and both output of the crystaloscillation clock source and the output of the current / voltage controlled oscillator are connected with the frequency locking detection circuit. The system can greatly simplify the correction and regulation flow and reduce the cost.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to a system for initializing and generating a stable internal clock. Background technique [0002] A stable and accurate clock is very important to the work of the circuit system. The traditional technology generally uses an external active / passive crystal oscillator to realize it, which requires adding additional devices, which increases the cost and area of ​​the circuit system. The traditional technology also adopts the hardware / software trimming of the on-chip oscillator to achieve a more accurate clock, but expensive test instruments and complicated testing steps are required, and the hardware trimming also increases the process cost. Contents of the invention [0003] The purpose of the present invention is to provide a system for initializing and generating a stable on-chip clock. The error generated in the manufacturing process of the on-chip clock is corrected through t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F1/04H03L7/06
Inventor 张子澈武国胜
Owner PHICOMM (SHANGHAI) CO LTD
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