Semiconductor device and method for forming the same

A semiconductor and device technology, applied in the field of semiconductor devices and their formation, to achieve the effect of reducing the problem of noise coupling
CN101452886AActive Publication Date: 2009-06-10SEMICON MFG INT (SHANGHAI) CORP
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Patent Information

Authority / Receiving Office
CN ยท China
Patent Type
Applications(China)
Current Assignee / Owner
SEMICON MFG INT (SHANGHAI) CORP
Publication Date
2009-06-10

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Abstract

The invention provides a semiconductor device, which comprises an isolation structure which is positioned in a semiconductor substrate, a deep n-type doping well which is positioned in an MOS transistor region of n channel-conductive type in an active area, as well as an n-type MOS transistor which is formed on the semiconductor substrate, wherein the deep n-type doping well is positioned under a p-type doping well in the region and is electrically connected with n-type doping wells on two sides, and the ion doping concentration peak value of the deep n-type doping well and the doping ion concentration of the n-type doping wells at equal depth are equal in range. The invention also provides a method for forming the semiconductor device. By forming the deep n-type doping well in the region where the n-type MOS transistor is in the semiconductor substrate, the method realizes the longitudinal isolation of the n-type MOS transistor and the semiconductor substrate, as well as the transverse isolation of the semiconductor devices on two sides, and reduces the noise coupling in a hybrid integrated circuit.
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Description

technical field

[0001] The present invention relates to semiconductor devices and methods of forming them. Background technique

[0002] With the development of modern CMOS technology, high-speed digital circuits and high-performance analog circuits can be integrated to form a mixed-signal integrated circuit, that is, a single-chip system (SoC). However, in the hybrid circuit, due to the large switching transient current in the digital state, disturbing charges are formed, and these disturbing charges can be coupled into sensitive analog circuits through the semiconductor substrate, forming background noise and causing interference.

[0003] Shrinking semiconductor geometries have made noise coupling to the floor a significant problem for designers of new, more highly integrated SoCs. At present, the "triple well" process is generally used to reduce interference by adding deep n-type doped wells in the semiconductor substrate.

[0004] figure 1 It is a schematic diagram o...

Claims

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