Test construction for light doped drain doping region square resistor and manufacturing method thereof

Abstract

A manufacturing method for a test structure of an LDD doped region square resistance comprises steps of providing a semiconductor substrate with a grid layer, wherein the semiconductor substrate is provided with a first region and a second region, patterning the grid layer, forming a grid electrode on the second region and at least two grid electrode on the first region, executing an LDD doping process to form LDD doped regions respectively in the semiconductor substrate between the grid electrodes of the first region and on the semiconductor substrate on two sides of the grid electrode of the second region, forming dielectric layers on the semiconductor substrate on the grid electrodes, on the lateral walls of the grid electrodes and between the grid electrodes, etching to remove the dielectric layers on the top of the grid electrodes and remaining a part of or the total dielectric layers on the LDD doped region of the first region. The invention further provides a test structure of an LDD doped region square resistance, which can be favorable for increasing testing precision of the LDD doped region square resistance.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a lightly doped drain doped area sheet resistance test structure and a manufacturing method thereof. Background technique [0002] With the continuous development of complementary metal-oxide-semiconductor transistor manufacturing technology, the integration level is getting higher and higher, the line width of the gate is getting smaller and smaller, and the length of the conductive channel under the gate is also continuously decreasing. [0003] In order to avoid or suppress the leakage current between the source and the drain caused by the shortening of the conductive channel length, the industry introduces a light doped drain (LDD) implantation process, that is, the source and drain are heavily doped Previously, shallow junction implants were performed with ions of higher molecular weight. [0004] In the LDD process, the implantation energy needs to be l...

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Problems solved by technology

[0014] However, due to the small thickness of the NLDD doped region (that is, the shallower junction depth), it is easily affected by other processes, for example, when the layer or structure on the second region 104 is subjected to an acid solution cleaning process or a plasma etching process. etc., will cause defects (Film Lost) such as surface damage and film loss in the NLDD-doped region, which will affect the test accuracy of the sheet resistance of the NLDD-doped region, thereby affecting the detection accuracy of the NLDD-doped region; when the NLDD-doped region is detected When the sheet resistance of the region does not meet the requirements, it cannot be determined whether it is caused by the NLDD doping process or the defect of the NLDD doping region

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