Metal oxide semiconductor (mos) transistors with increased break down voltages and methods of making the same

Abstract

The present invention discloses a transistor that breakdown voltage improvement and making method thereof, wherein the transistor comprises the following components: a substrate in a first conductive type and a first adulterate concentration; a drain region and a source region disposed in the substrate and have a second conductive type; a grid disposed in the source region and the drain region, wherein the grid and the substrate is separated by a grid oxidizing layer; a adjust implant region disposed on the substrate below the grid oxidizing layer and has the first conductive type, wherein the adjust implant region is provided with a second adulterate concentration higher than the first adulterate concentration; and planar junction formed between the adjust implant region and the drain region, wherein the adjust implant region and the drain region is provided with a preset shape for the sake of forming the planar junction with surface curvature pointing at the drain region, and release electric field intensity where the planar junction locates for further.

Description

technical field [0001] The invention relates to semiconductor components, especially high-voltage MOS transistors. Background technique [0002] Many applications of semiconductor devices require MOS transistors that can operate at relatively high voltages. figure 1 A cross-sectional view of a high voltage MOS transistor (eg, NMOS transistor 100 ) is shown. NMOS transistor 100 may be fabricated in P-type substrate 102 . In the P-type substrate 102, a P+ type ion implantation region 104 (body region) with a high doping concentration, an N+ type source region 106 (source electrode) with a high doping concentration and a drain with a low doping concentration can be formed. The region is implanted in an N-well 108 (N-well). An N+ type drain region 110 (drain) with high doping concentration can be formed in the N type well 108 . A gate oxide layer 112 may be formed above the P-type substrate region between the source 106 and the drain 110 . A gate 114 may be formed on the ga...

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Problems solved by technology

However, the above methods require additional processing steps and additional masks which increase the cost of the MOS transistors

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