Time switch template test method for TD-SCDMA terminal
A TD-SCDMA, time switch template technology, applied in energy-saving ICT, power management, sustainable buildings, etc., can solve problems such as difficulty in ensuring instrument reliability, unfavorable development and measurement of new TD-SCDMA terminals, and achieve long-term reliable maintenance. The effect of low requirements on repeatability and repeatability, and solving the requirements of high performance
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Embodiment 1
[0040] Embodiment 1: The sampling clock is 2.56MHz, and the steps are as follows:
[0041] (1) Set up the RMC reference measurement channel of 12.2kbps between the TD-SCDMA terminal test device and the TD-SCDMA terminal, then configure the TD-SCDMA terminal to enter the loopback test mode, and make the TD-SCDMA terminal transmit with a single code channel, Control the transmit power of the TD-SCDMA terminal to the maximum and complete the preparation for the test;
[0042] (2) Set the RF switch of the test equipment to the closed state;
[0043] (3) Control the TD-SCDMA terminal under test to send signals;
[0044] (4) Send a control signal to the A / D converter through the time delay device in the test equipment to ensure that the rising edge of the first sampling clock lags behind the RF switch control signal, and the A / D converter samples 2 point, and the sampling data is sent to the data processing device to calculate the signal power value of each sampling point accordin...
Embodiment 2
[0061] Embodiment 2: The sampling clock is 76.8MHz, and the steps are as follows:
[0062] (1) Set up the RMC reference measurement channel of 12.2kbps between the TD-SCDMA terminal test device and the TD-SCDMA terminal, then configure the TD-SCDMA terminal to enter the loopback test mode, and make the TD-SCDMA terminal transmit with a single code channel, Control the transmit power of the TD-SCDMA terminal to the maximum and complete the preparation for the test;
[0063] (2) Set the RF switch of the test equipment to the closed state;
[0064] (3) Control the TD-SCDMA terminal under test to send signals;
[0065] (4) Send a control signal to the A / D converter through the time delay device in the test equipment to ensure that the rising edge of the first sampling clock lags behind the RF switch control signal, and the A / D converter samples 60 times in one chip time points, and the sampling data is sent to the data processing device to calculate the signal power value of eac...
Embodiment 3
[0085] Embodiment 3 The sampling clock is 76.8MHz, and the steps are as follows:
[0086] (1) Set up the RMC reference measurement channel of 12.2kbps between the TD-SCDMA terminal test device and the TD-SCDMA terminal, then configure the TD-SCDMA terminal to enter the loopback test mode, and make the TD-SCDMA terminal transmit with a single code channel, Control the transmit power of the TD-SCDMA terminal to the maximum and complete the preparation for the test;
[0087] (2) Set the RF switch of the test equipment to the closed state;
[0088] (3) Control the TD-SCDMA terminal under test to send signals;
[0089] (4) Send a control signal to the A / D converter through the time delay device in the test equipment to ensure that the rising edge of the first sampling clock lags behind the RF switch control signal, and the A / D converter samples 60 times in one chip time points, and the sampling data is sent to the data processing device to calculate the signal power value of each...
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