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Electromagnetism interference isolation device

An isolation device and electromagnetic interference technology, applied in the direction of circuits, electrical components, electrical solid devices, etc., can solve the problems of repeated damage of periodically arranged units, serious EBG isolation performance, and inability to arrange arbitrary wiring

Active Publication Date: 2011-08-17
ZHUHAI INST OF ADVANCED TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Such a large number of through holes will definitely cause great damage to the repeatability of periodically arranged cells, thus seriously affecting the isolation performance of EBG.
Considering the complexity of the wiring and through-holes in the actual circuit board, in the process of designing the EBG structure, it is necessary to analyze and design the overall power distribution network, and at the same time, it is necessary to design and modify all units individually, instead of according to Arbitrary wiring according to actual needs, very little use of circuit integration

Method used

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  • Electromagnetism interference isolation device
  • Electromagnetism interference isolation device
  • Electromagnetism interference isolation device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0031] Such as figure 1 Shown is a top view of the structure of this embodiment. The electromagnetic interference isolation device of this embodiment is generally rectangular, with a size of 10mm*10mm. The first metal layer 10 , the dielectric layer 20 and the second metal layer 30 (not shown in the figure) are stacked in sequence. The first metal layer 10 includes a metal strip 11 , four regions 12 separated from each other, and a metal interconnection structure 13 connecting the metal strip 11 and each region 12 .

[0032] In this embodiment, the metal strip 11 has a width of 200 μm, and the intervals between the regions 12 and between the regions 12 and the metal strip 11 are equidistant, with a distance of 500 μm. The metal interconnection structure 13 has a width of 200 μm.

[0033] Such as figure 2 shown, for figure 1 A cross-sectional view of plane A-A in . The first metal layer 10 , the dielectric layer 20 and the second metal layer 30 are stacked in sequence, a...

Embodiment 2

[0037] In the above embodiments, the metal strip 11 is a closed rectangular frame. In this embodiment, a part of the metal strip can also be etched away to form a non-closed structure.

[0038] Such as Figure 5 Shown is a top view of the first metal layer of the structure of Embodiment 2. Since the metal strip 11 forms a non-closed structure, its equivalent circuit is as Figure 6 shown. Figure 7 It can be seen from the insertion loss simulation results of the structure of this embodiment that the filtering effects from the noise coupled from port 1 to port 2 to port 4 become better in turn. Therefore, connect the chip pins that need power supply to port 1 and port 4 respectively to obtain the best isolation effect.

Embodiment 3

[0040] The electromagnetic interference isolation device mentioned in the above embodiments can be placed in the printed circuit board by lamination technology, that is, its application can be realized by embedding technology. The metal strip 11 forms a closed or non-closed frame in the first metal layer 10 , and is formed by wiring in the plane where the first metal layer 10 is located. For the convenience of forming different inductors or connecting other components, the routing of the metal strip 11 is not limited to the plane where the first metal layer 10 is located. For example, the wiring of the metal strip can be introduced into other layers through the micro-vias in the printed circuit board medium, and even the surface of the printed circuit board can be drawn out to access surface mount components to expand the circuit structure.

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Abstract

An electromagnetism interference isolation device belongs to the field of electronic device. The device comprises a first metal layer, a dielectric layer and a second metal layer which are sequentially laminated, the first metal layer comprises metal strips located at edges and at least two mutually insolated sectors which are surrounded by the metal strips and spaced with the metal strips, each sector is connected with the metal strips via a metal interconnection structure, the second metal layer is an integral metal plate or has corresponding division with the first metal layer. The above structure can supply power for chip pins needing the same electric potential via each isolated sector, the equivalent circuit thereof is a multistage low pass filter, thus better isolating noise at thespace of the chip pins.

Description

【Technical field】 [0001] The invention relates to a circuit device, in particular to an electromagnetic interference isolation device. 【Background technique】 [0002] With the development of electronic systems in the direction of miniaturization, multi-function and high integration, the circuit system becomes more and more compact and complex. In order to reduce the size and cost of the system, the power supply and ground pins of the same potential of the same chip or different chips in the electronic system often share the power supply network and the ground network. The resulting "common source interference" and "common ground interference" will cause various bit errors and false triggers in the system, which will lead to system performance degradation and even failure. [0003] The traditional solution is to place multiple bypass capacitors as close as possible to the chip for interference suppression. Due to the large number of power supply and ground pins, the number o...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/552H01L23/48
Inventor 王云峰
Owner ZHUHAI INST OF ADVANCED TECH