Unlock instant, AI-driven research and patent intelligence for your innovation.

High trigger current SCR and ESD protective device

A technology for triggering current and devices, applied in the direction of electric solid devices, electrical components, semiconductor devices, etc., can solve the problems of low trigger current, uneven triggering, PN junction heating, etc. false trigger effect

Inactive Publication Date: 2010-04-28
SUZHOU POWERON IC DESIGN
View PDF0 Cites 7 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, in the application field of high-voltage integrated circuits, the current density is high, and the PN junction of the device is very hot, which makes ESD protection of high-voltage integrated circuits very difficult to do.
Moreover, using SCR as an ESD protection device in a high-voltage integrated circuit has problems such as uneven triggering and low triggering current.
Especially when the trigger current is low, it is easy to cause the SCR device to be falsely triggered under the influence of external noise interference, and a latch-up phenomenon occurs. The welding block is clamped at a lower voltage, which interferes with normal signal transmission. This makes ESD protection meaningless, so we must take measures to increase the trigger current of the SCR device
[0005] Some people in foreign countries have proposed to use an SCR and an NMOS together to form an ESD protection device, which can greatly increase the trigger current of the SCR. However, due to the introduction of an NMOS tube, it will obviously increase the complexity of the process and increase the area of ​​the chip, which is not conducive to chip integration.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • High trigger current SCR and ESD protective device
  • High trigger current SCR and ESD protective device
  • High trigger current SCR and ESD protective device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0019] refer to figure 2 , a high trigger current SCR ESD protection device, comprising: a P-type doped semiconductor substrate 1, adjacent N-type doped wells 2 and P-type doped wells are respectively arranged on the P-type doped semiconductor substrate 1 The well 3 is provided with an N-type doped semiconductor region 4 and a P-type doped semiconductor region 5 in the N-type doped well 2, and an N-type doped semiconductor region 6 and a P-type doped semiconductor region are arranged in the P-type doped well 3. Miscellaneous semiconductor region 7, the N-type doped semiconductor region 4 on the surface of the N-type doped well 2 and the region other than the P-type doped semiconductor region 5 and the N-type doped semiconductor region 6 on the surface of the P-type doped well 3 Field oxide layer 8 is provided in areas other than P-type doped semiconductor region 7, and field oxide layer 8, N-type doped semiconductor region 4, P-type doped semiconductor region 5, N-type doped ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to a high trigger current SCR and ESD protective device, comprising a P-type doped semiconductor substrate, an N-type doped well and a P-type doped well are respectively arranged on the P-type doped semiconductor substrate, an N-type doped semiconductor area and a P-type doped semiconductor area are arranged in the N-type doped well, the N-type doped semiconductor area and the P-type doped semiconductor area are arranged in the P-type doped well, an anode metal layer and a metal layer are respectively connected above the N-type doped semiconductor area and the P-type doped semiconductor area on the surface of the N-type doped well, a metal layer and a cathode metal layer are respectively connected above the N-type doped semiconductor area and the P-type doped semiconductor area on the surface of the P-type doped well, and the anode metal layer and the metal layer are connected by a diode which is formed by the P-type doped semiconductor area and the N-type doped semiconductor area, and the metal layer and the cathode metal layer are directly connected by metal. The protective device can effectively improve the trigger current and is suitable for ESD protection in a high-voltage integrated circuit.

Description

technical field [0001] The invention belongs to the technical field of high-voltage integrated circuits, relates to an electrostatic discharge protection device, and more specifically relates to a lateral semiconductor silicon control device suitable for an electrostatic discharge (Electro-Static Discharge, ESD) protection circuit in a high-voltage environment. rectifier controller. Background technique [0002] With the growing role of multimedia applications in everyone's daily life and the ever-increasing relationship between computers and consumer electronics, there will be a continuous demand for increased portability and functionality. This requires a higher level of integration of components - the general trend is to result in sensitive and expensive chips, the risk of damage due to ESD surges in the presence of external interfaces is also increasing. As products such as cell phones, digital cameras, MP3 players, and PDAs provide more functionality, they also have mo...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L27/04H01L29/74H01L29/06H01L21/82H01L23/60
CPCH01L29/87
Inventor 李海松刘侠王钦杨东林陈文高易扬波
Owner SUZHOU POWERON IC DESIGN