Semiconductor device

Abstract

Provided is a semiconductor device in which occurrence of humps can be suppressed and variations in characteristics of the semiconductor device can be suppressed. The semiconductor device includes: an element isolation film (200) formed in a semiconductor layer, the element isolation film (200) defining an element formation region; a gate electrode (130) formed above the element formation region, the gate electrode (130) having ends respectively extending above the element isolation film (200); and impurity regions (110) which are to be a source region and a drain region which are formed in the element formation region so as to sandwich therebetween a channel formation region immediately under the gate electrode (130), the gate electrode (130) including at each of the ends thereof a high work function region (124) in which work function is higher than work function in other regions over at least a part of an interface between the element formation region and the element isolation film (200).

Description

technical field [0001] The present invention relates to a semiconductor device in which peaks are suppressed. Background technique [0002] In recent years, higher integration of transistors has been required in response to demands for chip size reduction. One solution to this problem is an element isolation technique known as Shallow Trench Isolation (STI). However, when STI is employed, the gate oxide film becomes thinner at the interface between the diffusion layer portion and the STI portion than other portions, and thus, a parasitic transistor is formed. [0003] Figure 4 is a graph showing the relationship between gate voltage and drain current in a transistor having a parasitic transistor formed therein. exist Figure 4 In , curve A shows the relationship between the gate voltage and drain current in the main transistor, and curve B shows the relationship between the gate voltage and drain current in the parasitic capacitor. Equivalently, a transistor with a paras...

AI Technical Summary

Problems solved by technology

[0006] However, in the technique disclosed in Japanese Patent Application Laid-Open No. 200-101084, in the depletion region, impurities diffuse from the region adjacent to the region

Therefore, the concentration of impurities in the depletion region varies greatly, and, as a result, the characteristics of semiconductor devices vary greatly

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