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counting loop-oriented c-to-VHDL mapping method and device

A mapping method and loop-like technology, applied in the direction of program control devices, etc., can solve the problems that DWARV does not support jumps, does not support non-counting loops, etc., and achieves the effect of high maximum clock frequency and simple loop control

Inactive Publication Date: 2010-06-02
HARBIN ENG UNIV
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AI Technical Summary

Problems solved by technology

DWARV only supports counting loops, not non-counting loops. At the same time, DWARV does not support jumps in loop control

Method used

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  • counting loop-oriented c-to-VHDL mapping method and device
  • counting loop-oriented c-to-VHDL mapping method and device
  • counting loop-oriented c-to-VHDL mapping method and device

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Embodiment Construction

[0042] The present invention is described in more detail below in conjunction with accompanying drawing example:

[0043] 1 high-frequency loop basic module

[0044] 1.1 Cyclic IR structure analysis

[0045] The present invention can be based on the LLVM architecture, utilize LLVM as the front end to convert the for loop in the C language into LLVM IR, and then perform conversion processing on the LLVM IR of the for loop. LLVM IR is an intermediate expression independent of machine architecture.

[0046] A loop BasicBlock (basic module) is mainly composed of three parts: LoopEntry (loop entry module), Loop_exit (loop exit module) and No_exit (loop execution module), among which LoopEntry mainly completes data selection and public operations (the loop can be advanced part) And the selection of the branch path, No_exit completes the operation in the loop body, and Loop_exit completes the operation after the loop is completed. The relationship between these loop modules is wro...

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Abstract

The invention provides a counting loop-oriented C-to-VHDL mapping method and device. The device consists of a counter generating loop key variables, a comparer deciding whether to carry out arithmetic in a loop body or not according to a comparing arithmetic result, a selector acquiring data values outside the loop body or feedback values of the operation result in the loop body according to select switch values and an arithmetic unit for executing arithmetic operation in the loop body. A counting quasi-loop program realized by C language is automatically converted into a VHDL program which can be realized on Xilinx-series FPGA. Based on a sequential circuit and through separating loop control signals and enable output signals, the method carries out loop control in advance to decompose the counting quasi loop in C language into a loop basic module with higher clock frequency. Various forms of C language loop can be realized through combining a plurality of high-frequency loop basic modules.

Description

technical field [0001] The invention relates to a method for converting high-level language into hardware circuit. Specifically, it is a C-to-VHDL synthesis optimization method for counting loops, that is, a loop program implemented in C language is automatically converted into a synthesizable VHDL program, and finally transplanted to Xilinx series FPGAs to run. The invention also relates to a device suitable for the method. Background technique [0002] There are mainly two methods to convert high-level language into hardware circuit: one is the C-like language that started earlier, that is, to design a new software / hardware description language or programming model, synthesize it into a netlist file, and then use Specialized hardware synthesis tools implement layout and routing; another method is to directly synthesize high-level language (C, C++, Matlab) programs into VHDL hardware description language, and then use existing commercial tools to synthesize and route VHDL ...

Claims

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Application Information

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IPC IPC(8): G06F9/44
Inventor 吴艳霞顾国昌孙延腾杨杰牛晓霞杨敏
Owner HARBIN ENG UNIV
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