Synchronous display device, stacking splicing display system and synchronous display method thereof

A technology of synchronous display and display card, applied in identification devices, components of TV systems, digital output to display devices, etc., can solve problems such as untimely response time, interrupted display output, blurry screen, etc., to improve accuracy and continuity. sexual effect

A technology of synchronous display and display card, applied in identification devices, components of TV systems, digital output to display devices, etc., can solve problems such as untimely response time, interrupted display output, blurry screen, etc., to improve accuracy and continuity. sexual effect

CN101763840AInactive Publication Date: 2010-06-30GUANGDONG VTRON TECH CO LTD

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  • Synchronous display device, stacking splicing display system and synchronous display method thereof
  • Synchronous display device, stacking splicing display system and synchronous display method thereof
  • Synchronous display device, stacking splicing display system and synchronous display method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0026] see figure 2 As shown, it is a schematic structural diagram of Embodiment 1 of the synchronous display device of the present invention.

[0027] Such as figure 2 As shown, in this example, multiple PCs are used as an example for splicing display. It is assumed that each PC includes only one display card. As shown in the figure, the synchronous display device includes a synchronous control circuit and two The above PCs, wherein the synchronization control circuit includes a frame synchronization control circuit and a reference clock generation circuit, each PC includes a motherboard and a display card, and each display card is inserted and connected to the motherboard of the PC where it is located , the clock signal input terminals of the display cards of all PCs are connected with the signal output terminals of the reference clock generation circuit, and the signal input terminals of the motherboards of all PCs are connected with the signal output terminals of the fr...

Embodiment 2

[0048] In the above description of Embodiment 1, an independent frame synchronization control circuit generates a reference frame synchronization signal for frame synchronization adjustment. In fact, the frame synchronization of the display channel of one of the display cards can also be used. The signal is used as a reference frame synchronization signal, and the frame synchronization adjustment is performed accordingly, so that it is not necessary to specially generate a reference frame synchronization signal.

[0049] see Figure 4 As shown, it is a schematic structural diagram of Embodiment 2 of the synchronous display device of the present invention. In this example, the main difference from the above-mentioned Embodiment 1 is that in this embodiment, the frame of the display channel of one of the display cards is selected. The synchronization signal serves as a reference frame synchronization signal.

[0050] Such as Figure 4As shown, in the synchronous display device...

Embodiment 3

[0056] see Figure 4 As shown, it is a schematic structural diagram of Embodiment 3 of the synchronous display device of the present invention, which is the simplest method among the above-mentioned synchronous control methods using a specially designed synchronous control circuit.

[0057] In the illustration, the main control part is taken as an example of a single-chip microcomputer or FPGA for illustration. The reference clock signals clk1 and clk2 generated by the reference clock generation circuit are respectively connected to the clocks of the corresponding two display cards (not shown in the figure). At the input terminal, Vh1 represents the frame synchronization signal from display channel 1, and Vh2 represents the frame synchronization signal from display channel 2. Vh1 is used as the reference frame synchronization signal, and FPGA performs a time comparison between Vh1 and Vh2 to compare the difference between the two , and judge whether the difference value exceed...

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Abstract

The invention relates to a synchronous display device and a synchronous display method. The device comprises a synchronous control circuit, more than one mainboards and more than two display cards. Any one of mainboards is inserted with at least one display card. The synchronous control circuit comprises a frame synchronous control circuit and a reference clock generating circuit. A signal output end of the frame synchronous control circuit is connected with a signal input end of each mainboard. A signal output end of the reference clock generating circuit is connected with a clock signal input end of each display card. The frame synchronous control circuit generates a reference frame synchronous signal or uses a frame synchronous signal of a display channel of a preset display card as the reference frame synchronous signal. Each mainboard adjusts the frame synchronous signal of the display channel of the corresponding display card according to the reference frame synchronous signal. The invention adopts the same reference frame synchronous signal and reference clock signal to together complete synchronous display, cannot generate the clock error and also cannot generate the accumulated error among the frame synchronous signals so as to improve accuracy and continuity of synchronization among the display signals.

Description

technical field [0001] The present invention relates to the technical field of image display, in particular to a synchronous display device and a synchronous display method for the synchronous display device, a superimposed display system, and a spliced ​​display system. Background technique [0002] The patent application with application number 200810198074.5 and publication number CN101383913A discloses a display superimposition control system and its control method. The system includes a superposition control circuit, a frame synchronization control circuit, a display and at least two display signal output devices. Each display The display output terminal of the signal output device is electrically connected with the superposition control circuit, the frame synchronization control circuit is electrically connected with the control signal input terminal of each display signal output device, and the superposition control circuit, and the superposition control circuit is ele...

Claims

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Application Information

Patent Timeline
30 Jun 2010
Publication
CN101763840A
IPC
G09G5/00; H04N5/265; G09F9/00; G06F3/14
Inventors
卢如西; 赖强