Phase-switching prescaler based on injection-locking

Abstract

The invention discloses a phase-switching prescaler based on injection-locking, comprising a multi-phase generator, a multi-channel selector, a true single-phase clock module and a state machine. The multi-phase generator is used for primarily scaling the signal to be scaled and generating N signals with equal phase difference; the multi-channel selector is used for selecting one branch of signal from the N signals with equal phase difference; the true single-phase clock module is used for secondarily scaling the branch of signal selected from the N signals with equal phase difference by the multi-channel selector to obtain the output signal of the phase-switching prescaler; and the state machine is used for transforming the scaling-ratio control signal of the phase-switching prescaler into the control signal of the multi-channel selector. Avoiding adopting the current mode logic, the phase-switching prescaler keeps consuming low power when working at high frequency. An even number of signals with equal phase difference can be generated, thus the scaling-ratio can be selected flexibly when the system is designed. The phase-switching prescaler has better ability of resisting the common-mode noise.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a CMOS integrated phase-locked loop prescaler. Background technique [0002] The radio frequency phase-locked loop is an important module in the wireless transceiver system. It is used as a frequency synthesizer to generate a local oscillator signal for functions such as spectrum shifting and channel selection. In the phase-locked loop structure of the frequency synthesizer, it is necessary to perform controllable frequency division on the radio frequency signal output by the voltage-controlled oscillator (VCO). The general digital unit cannot work in the radio frequency band, so it is necessary to design a prescaler to reduce the frequency of the signal at the radio frequency end, and then use standard digital circuit design methods for further frequency division processing. [0003] In recent years, with the continuous development of wireless communication technolo...

AI Technical Summary

Problems solved by technology

The traditional divide-by-2 circuit adopts a true single phase clock structure (True Single Phase Clock, TSPC) or an extended true single phase clock structure (Extended-TSPC), but when the frequency continues to increase so that the above two structures cannot work normally When working, the use of current mode logic (CurrentMode Logic, CML) will greatly increase the power consumption due to the existence of static power consumption

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