GPU-based Cache simulator and spatial parallel acceleration simulation method thereof

A simulator and analog module technology, applied in software simulation/interpretation/simulation, instruments, memory systems, etc., can solve problems such as unsatisfactory acceleration effect, unsatisfactory requirements, and cost acceleration, achieving obvious acceleration effect and shortening simulation time , the effect of improving efficiency

Inactive Publication Date: 2010-08-25
BEIHANG UNIV
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Problems solved by technology

The space-based parallel simulation is to divide the space of the Cache simulation algorithm. For example, the cluster is used to simulate the Cache grouping. The predecessors have done the parallel acceleration of the GPU-based Cache grouping simulation, but it is limited to the development of a single-layer Cache simulation. For the current processing The

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  • GPU-based Cache simulator and spatial parallel acceleration simulation method thereof
  • GPU-based Cache simulator and spatial parallel acceleration simulation method thereof
  • GPU-based Cache simulator and spatial parallel acceleration simulation method thereof

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Embodiment Construction

[0044] The present invention will be further described in detail below in conjunction with the accompanying drawings.

[0045] As shown in Figure 1, a kind of GPU-based Cache simulator 1 proposed by the present invention comprises five modules: Cache initialization module 2, Trace preprocessing module 3, Trace radix sorting module 4, Cache simulation module 5, Cache simulation result statistics Module 6 is displayed.

[0046] Cache initialization module 2 is responsible for performing initialization operations when Cache simulator 1 is started; allocates storage space for Cache in main memory, and reads the basic configuration parameters of Cache to be simulated from terminal input 7 or Cache configuration file 8, and configures Cache Perform the initialization operation and complete the initialization of the statistical information at the same time. Then pass the Cache configuration parameters to the Trace preprocessing module 3 and the Cache simulation module 5 . Cache con...

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Abstract

The invention provides a GPU-based Cache simulator and a spatial parallel acceleration method thereof. The Cache simulator comprises a Cache initialization module, a Trace preprocessing module, a Trace radix sorting module, a Cache simulation module and a Cache simulation result summarization and display module. The invention adopts powerful parallel processing resources of the GPU to preprocess memory access sequences, and utilizes the relevance of Cache configuration files to parallel sort the memory access sequences through a radix sorting algorithm operating on the GPU, thereby obtaining continuous memory access sequences mapped in each group and achieving inter-group parallel Cache simulation. Moreover, due to the parallel simulation algorithm with different levels and different grain sizes, the invention effectively reduces the Cache simulation time, improves the Cache simulation efficiency and realizes the accurate simulation of behaviors of the Cache. Moreover, the invention has the advantages of simple development environment and easy implementation.

Description

technical field [0001] The invention relates to a Cache simulator and an acceleration method thereof, in particular to a GPU-based Trace-drivenCache simulator and a space parallel acceleration method thereof, belonging to the field of computer architecture and parallel computing. Background technique [0002] Cache (high-speed cache memory) technology is undoubtedly one of the greatest inventions in the computer field in the 20th century. Its appearance has effectively narrowed the speed gap between the processor and the memory, and greatly improved the performance of the computer system. Therefore, in modern processor design, Cache design has become an important part of computer system architecture design. The Cache simulator provides reliable experimental data for Cache design, provides more instructive improvement solutions for Cache performance improvement, and effectively shortens the Cache design cycle. [0003] The simulator is divided into a hardware simulator and a...

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Application Information

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IPC IPC(8): G06F9/455G06F12/08G06T1/20G06T1/60G06F12/0884
Inventor 高小鹏万寒王志强李毅龙翔
Owner BEIHANG UNIV
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