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Voltage stabilizer on mixed signal integrated circuit chip

An integrated circuit, mixed-signal technology, used in instruments, regulating electrical variables, control/regulating systems, etc., to solve problems such as the performance impact of power-sensitive analog circuits

Inactive Publication Date: 2010-09-29
BEIHANG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] In mixed-signal integrated circuits, the switching operation of digital circuits will generate a lot of noise on the power supply through the parasitic resistance on the power supply line, bonding wire inductance or package parasitic inductance. The noise amplitude sometimes reaches 10% of the power supply voltage. The performance of power sensitive analog circuits has a large impact on the

Method used

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  • Voltage stabilizer on mixed signal integrated circuit chip
  • Voltage stabilizer on mixed signal integrated circuit chip
  • Voltage stabilizer on mixed signal integrated circuit chip

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Embodiment 1

[0030] figure 2 It is a circuit diagram of the first embodiment of the on-chip voltage regulator of the present invention. figure 2 Among them, the charge pump 1 is controlled by the clock CLK1 to generate a voltage V1 higher than the power supply; the charge pump 2 is controlled by the clock CLK2 to generate another voltage V2 higher than the power supply, and the current source 4 is the load of the charge pump 2. Resistor 6 and capacitor 5 form a first-order low-pass filter, and V2 is the input of the low-pass filter to generate an output voltage V3. The NMOS source follower 7 works in the saturation region, its drain is connected to V1, its gate is connected to V3, and its source is V4. The error amplifier 13 , the adjustment tube 14 , the resistor 15 and the resistor 16 form the LDO 17 . The voltage V4 is the power supply of the LDO 17, the reference voltage of the LDO 17 is the output voltage V7 of the bandgap reference source 12, and the output of the LDO 17 is the o...

Embodiment 2

[0032] Figure 4 It is a structural diagram of the second embodiment of the on-chip voltage regulator of the present invention. Figure 4 Among them, the on-chip voltage regulator 4 of the present invention is powered by the core voltage 1 of the chip, the voltage regulator 4 generates a stable power supply 3 , and the stable power supply 3 is used to supply power to the on-chip oscillator 5 . If the oscillator 5 is a voltage controlled oscillator in a phase-locked loop, since its power supply 3 is stable, the power supply noise on the core voltage 1 will not cause jitter; because the value of the power supply 3 is large, the locking range of the phase-locked loop is also large . The clock 2 generated by the oscillator can be used as the clock for the on-chip voltage regulator 4 .

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Abstract

The invention relates to a voltage stabilizer on a mixed signal integrated circuit chip for providing a stable power supply to a sensitive analogue circuit. A charge pump generates a high voltage, while voltage generated by the other charge pump is connected to the grid electrode of an NMOS (N-channel Metal Oxide Semiconductor) source electrode follower after passing through a low pass filter. A current source is used as a load of the second charge pump. The drain electrode of the source electrode follower is connected to the output of the first charge pump and the stable voltage output is obtained at the source electrode after passing through a low dropout linear voltage stabilizer (LDO). The output voltage of a bandgap reference source is used as the reference voltage of the LDO. The clock of the second charge pump is generated by an NAND door and controlled by a voltage detection circuit.

Description

technical field [0001] This invention relates to on-chip voltage regulators for providing stable power to sensitive analog circuits in mixed-signal integrated circuits. Background technique [0002] In mixed-signal integrated circuits, the switching operation of digital circuits will generate a lot of noise on the power supply through the parasitic resistance on the power supply line, bonding wire inductance or package parasitic inductance. The noise amplitude sometimes reaches 10% of the power supply voltage. The performance of power-sensitive analog circuits has a large impact. [0003] Voltage regulators are widely used in various electronic systems to provide a stable voltage to other circuits in the system. LDO is a linear voltage regulator with small output and input voltage drop, which is often used in portable equipment. Patent Publication 1 provides an LDO with a strong power supply noise suppression rate, which adopts a feed-forward technique to cancel the power ...

Claims

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Application Information

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IPC IPC(8): G05F1/10
Inventor 孙泉张有光王洛
Owner BEIHANG UNIV
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