Error correction encoding method for dynamic random access memory (DRAM) buffer

Abstract

The invention discloses an error corrosion encoding method for a dynamic random access memory (DRAM) buffer, which comprises the following steps of: (1) prolonging a refresh cycle of the DRAM buffer and reducing refresh frequency; and (2) encoding and decoding data in the buffer. In the method, refresh time is set according to the most error-prone bits, some error data is compensated by error correction technology which is powerful enough to correct a plurality of bits, which means the refresh time can be prolonged, thereby reducing power consumption.

Description

technical field [0001] The invention relates to the fields of embedded hardware design and storage energy-saving design, and in particular relates to an error correction coding method for DRAM cache. Background technique [0002] At present, advanced technology makes it possible to integrate a large embedded DRAM cache on the chip, which is denser than traditional SRAM, but the circuit must be refreshed in time to ensure data integrity, and DRAM is easily affected by equipment materials, which plays a decisive role in the refresh cycle , The power consumption point required for refresh accounts for the vast majority of the energy consumption of the entire system, so large DRAM integration brings the problem of increased refresh power consumption. [0003] The embedded DRAM cache is highly integrated and needs to be refreshed frequently. Otherwise, the information on some storage units will be lost due to power loss, making the data unavailable, and high-frequency refresh wil...

AI Technical Summary

Problems solved by technology

But the smart refresh method is inefficient in the idle state, because no cache line will be accessed in the idle state, so the purpose of reducing power consumption cannot be achieved

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