Semiconductor structure and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device parts, electric solid-state devices, etc., can solve problems such as hindering chip heat conduction, low heat conduction efficiency, and affecting the reliability of stacked chip packaging structures, etc., to achieve Effect of improving heat dissipation efficiency and improving bonding strength
CN101980360BActive Publication Date: 2012-08-29ADVANCED SEMICON ENG INC
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Patent Information

Authority / Receiving Office
CN ยท China
Patent Type
Patents(China)
Current Assignee / Owner
ADVANCED SEMICON ENG INC
Publication Date
2012-08-29

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Abstract

The invention discloses a semiconductor structure and a manufacturing method. In the semiconductor structure, conductive through holes and a radiation layer are arranged on the periphery of the back side of a lower chip for improving the bonding strength of a radiation fin assembled subsequently and for providing a good heat conducting path for improving the radiation efficiency of the semiconductor structure. The invention also provides a manufacturing method of the semiconductor structure.
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Description

technical field

[0001] The invention relates to a semiconductor structure and a manufacturing method thereof, and in particular to a semiconductor structure using through-silicon vias for chip stacking and a manufacturing method thereof. Background technique

[0002] In today's information society, users are pursuing high-speed, high-quality, and multi-functional electronic products. As far as product appearance is concerned, the design of electronic products is moving towards the trend of light, thin, short and small. Therefore, electronic packaging technology has developed multi-chip packaging technologies such as stacked chip packaging.

[0003] Stacked chip packaging is to package multiple integrated circuit (Integrated Circuit, IC) chips in the same packaging structure by vertical stacking, so that the packaging density can be increased to miniaturize the packaging structure, and the chip can be shortened by using three-dimensional stacking. The length of the signal t...

Claims

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