Preparation method of field effect transistor

Abstract

The invention provides a preparation method of a field effect transistor, comprising the following steps of: supplying a first molded body substrate, forming a shallow groove by utilizing a photoetching and etching method, and growing to form a silicon dioxide shallow groove isolation structure in the shallow groove; depositing on the first molded body substrate and the silicon dioxide shallow groove isolation structure to form a high-K gate dielectric layer and a metal gate electrode layer; forming a grid electrode structure by utilizing a photoetching or corrosion process and the like; implanting second molded body foreign ions to form a source drain extension area; depositing an insulating layer to form a side wall attached to the edge of a grid electrode; implanting the second molded body foreign ions to form a source drain area of a second molded body field effect transistor and a PN (Performance Number) junction interface positioned between the source drain area and a silicon substrate; and carrying out microwave annealing to activate the implanted ions. The novel process of the field effect transistor can activate the impurities in the source drain area at lower temperature and reduce the influence of source drain annealing on a high-K gate dielectric / metal gate electrode.

Description

【Technical field】 [0001] The invention relates to a semiconductor manufacturing method, in particular to a field effect transistor manufacturing method. 【Background technique】 [0002] With the development of semiconductor technology, metal-oxide-semiconductor field effect transistors (MOSFETs) have been widely used. In recent years, microelectronics technology with silicon integrated circuits as the core has developed rapidly. The development of integrated circuit chips basically follows Moore's law, that is, the integration level of semiconductor chips doubles every 18 months. [0003] However, with the continuous increase in the integration of semiconductor chips, the channel length of the MOSFET is also continuously shortened. When the channel length of the MOSFET becomes very short, serious short-channel effects will occur, such as: the channel length decreases After reaching a certain level, the proportion of the depletion region of the source and drain junctions in t...

AI Technical Summary

Problems solved by technology

Its characteristic is that the high-K gate dielectric / metal gate electrode is formed after the impurity activation in the source and drain regions, which eliminates the impact of high-temperature annealing, but its process is complex and costly, and due to the limitation of the opening filling ratio of the Damascene process, its Scalability is worse than conventional Gate-First process

Images