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3D semiconductor device

A semiconductor, three-dimensional technology, applied in the field of three-dimensional semiconductor devices, can solve problems such as the limitation of integration of two-dimensional semiconductor memory, and achieve the effect of low manufacturing cost

Active Publication Date: 2015-11-18
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, since increasing pattern fineness would require extremely expensive equipment, the integration level of two-dimensional semiconductor memory is increased but still limited

Method used

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Examples

Experimental program
Comparison scheme
Effect test

no. 1 approach

[0038] Figure 1 to Figure 5 is a perspective view illustrating a method of manufacturing a three-dimensional semiconductor device according to a first embodiment of the inventive concept. Figure 6 to Figure 8 is a perspective view showing a part of the three-dimensional semiconductor device according to the first embodiment of the inventive concept in more detail.

[0039] refer to figure 1, the molding layer structure MLS is formed on the substrate 100 and then patterned to form the active opening 150 for exposing the upper surface of the substrate 100 .

[0040] For example, the substrate 100 may be formed of a semiconductor material (eg, a silicon wafer), an insulating material (eg, glass), and one of a semiconductor member or a conductive member covered with an insulating film. The substrate 100 may have an upper surface parallel to the xy plane. The active opening 150 may be two-dimensionally formed on the substrate 100 or an xy plane.

[0041] The molding layer str...

no. 2 approach

[0069] Figure 10 to Figure 12 , Figure 13A , Figure 14A and Figure 15A is a perspective view illustrating a method of manufacturing a three-dimensional semiconductor device according to a second embodiment of the inventive concept. Figure 13B , Figure 14B to Figure 14D as well as Figure 15B to Figure 15D It is a perspective view that provides the technical spirit for understanding the inventive concept. Particularly, Figure 10 to Figure 12 as well as Figure 13A to Figure 15A is a perspective view showing a method of manufacturing a semiconductor device according to an embodiment in a predetermined first viewing angle. Figure 13B to Figure 15B is a perspective view showing that in a second viewing angle different from the first viewing angle Figure 13A , Figure 14A and Figure 15A semiconductor device shown in . Figure 14C and Figure 14D is the perspective view used to explain in more detail the Figure 14A The technical characteristics described in. ...

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Abstract

Provided are a three-dimensional semiconductor device and a method of fabricating the same. The three-dimensional semiconductor device may include a mold structure for providing gap regions and an interconnection structure including a plurality of interconnection patterns disposed in the gap regions. The mold structure may include interlayer molds defining upper surfaces and lower surfaces of the interconnection patterns and sidewall molds defining sidewalls of the interconnection patterns below the interlayer molds.

Description

technical field [0001] The disclosure herein relates to a method of manufacturing a three-dimensional semiconductor device and a three-dimensional semiconductor memory. Background technique [0002] In order to meet consumer demand for excellent performance and low price, highly integrated semiconductor devices may be required. In the case of semiconductor memories, an increased level of integration is particularly desired because their level of integration can be an important factor in determining product prices. In the case of conventional two-dimensional or planar semiconductor memories, since their degree of integration can be mainly determined by the area occupied by a unit memory cell, the degree of integration is significantly affected by the level of fine pattern formation technology. However, since increasing the pattern fineness would require extremely expensive equipment, the integration level of the two-dimensional semiconductor memory is increased but still lim...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L25/00H01L27/115H01L23/528H01L21/768H01L21/8239G11C7/12G11C7/18H10B41/20H10B43/20H10B69/00H10B99/00
CPCH01L21/76816H01L27/11551H01L27/11556H01L27/11578H01L27/11582H01L2924/0002H10B41/20H10B41/27H10B43/20H10B43/27H01L2924/00G03F7/0002G03F7/0037H10B41/10H10B41/30H10B43/10H10B43/30H01L23/291H01L23/3157H01L23/528
Inventor 沈载株金汉洙赵源锡张在薰曹雨辰
Owner SAMSUNG ELECTRONICS CO LTD
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