Circuit for parallelly encoding quasi-cyclic low-density parity check code

Abstract

The invention discloses a circuit for parallelly encoding a quasi-cyclic low-density parity check code. The circuit comprises one or more encoding circuit units; each of the encoding circuit units comprises a first register group 1, an AND-gate array 2, an exclusive or (XOR) gate group 3 and a second register group 4; both the first register group and the second register group consist of L registers according to a dimension L of a cyclic permutation matrix; the XOR gate group consists of L XOR gates according to the dimension L of the cyclic permutation matrix; the output end of the first register group is connected with the input end of the AND-gate array; the output end of the AND-gate array is connected with the input end of the XOR gate group; the output end of the XOR gate group is connected with the input end of the second register group; and the output end of the second register group is connected with the input end of the XOR gate group. By the circuit for parallelly encoding the quasi-cyclic low-density parity check code, the parallel encoding of the quasi-cyclic low-density parity check code is realized; the encoding complexity is low and the encoding speed is high; the sequence and the dimension of the cyclic permutation matrix cannot be restrained, so a parallel factor is not restrained; therefore, the circuit has the advantages of high flexibility and small area.

Description

technical field [0001] The invention relates to an encoding circuit, in particular to a quasi-circular low density parity check code parallel encoding circuit. Background technique [0002] Gallager invented the low-density parity-check code in 1962, but until recently people gradually realized that it has excellent performance and great practical value. Low-density parity-check codes are a class of linear block codes with excellent performance. Low-density parity-check codes with specific structures can obtain excellent performance close to the Shannon limit, making them a hot spot in current research and applications. In the fields of communication and storage It can be seen in all. The check matrix of the low-density parity-check code is composed of a sparse matrix, so that there is an efficient decoding algorithm for the low-density parity-check code. The decoding complexity and the code length of the belief propagation algorithm have a linear relationship, which overco...

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Problems solved by technology

Among them, the first structure is a serial structure, and the hardware cost is small, but the time required for encoding needs the number of cycles equal to the length of the information, and the speed is slow; although the second structure is faster, it needs to prepare all information bits in advance. The resulting storage cost is very high, especially when the information length is relatively long; the third structure also requires that all information bits be prepared in advance, and the H matrix needs to be full rank, but in fact, quasi-cyclic low-density parity checksum Matrices are generally not of rank

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