Storage unit capable of controlling bit line oscillation amplitude for register file

Abstract

The invention belongs to the technical field of the design of the storage unit of an integrated circuit, and in particular relates to a storage unit capable of controlling the bit line oscillation amplitude for a register file. The storage unit comprises two phase inverters, two write transistors, two read transistors, two read insulating tubes and two mode control transistors in a cross mode, wherein the two phase inverters are coupled between a power supply and the ground. When a mod signal is under a power supply voltage, a pseudo earth wire voltage approaches to a power ground; and when the mod signal is on the power ground, the pseudo earth wire voltage is a certain middle-point voltage. The storage unit can limit the oscillation amplitude of a readbit line to lower the power consumption of a register file; and under a certain special condition, bit line full swing is required to adapt to requirements. The control unit provided by the invention can conveniently realize conversion between the full oscillation amplitude and the low oscillation amplitude of the bit line.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit storage unit design, in particular to a register file and a random static storage unit. Background technique [0002] The register file is the first-level storage unit in the processor, which requires small area, high speed, and low power consumption. The speed function of the register file and the power consumption play a decisive role in the performance of the processor. With the development of technology, the operating frequency of the processor is getting higher and higher, which puts forward great requirements on the operating frequency and power consumption of the register file. [0003] figure 1 A conventional 8-pipe register file storage unit 110 is shown. The PMOS transistor 100 and the NMOS transistor 102 form an inverter coupled between the power supply voltage and the ground, the gate terminal of which is connected at the node 109, and the drain terminal node 108; similar...

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Problems solved by technology

However, since the read isolation transistors 207 and 208 are directly connected to the ground, the discharge speed of the read bit line is relatively fast, even reaching a rail-to-rail swing, resulting in a large power loss

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