Contactless integrated circuit (IC) wafer pad layout design method
A layout design, non-contact technology, applied in the manufacturing of electrical components, electric solid-state devices, semiconductor/solid-state devices, etc., can solve the problems of increasing the amount of gold wire material for chip packaging, increasing product packaging costs, and affecting the packaging yield. The effect of improving the pickup efficiency, improving the pass rate, and simplifying the pickup process
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[0016] The specific implementation and installation, configuration and use of a non-contact IC chip Pad layout design method of the present invention will be described below in conjunction with the accompanying drawings.
[0017] refer to figure 1 In the figure, the first kind of non-contact IC chip 1 is placed on the first kind of chip carrier table 6 of the first kind of chip carrier frame 3, wherein two antenna solder joints are arranged on the first kind of chip carrier frame 3 5. The chip is connected to the outside (chip carrier tape, coupling antenna) through these two solder joints, so that the IC card can obtain energy from the external system and exchange data with the external system in an electrically coupled manner.
[0018] refer to figure 2 In the figure, the second non-contact IC chip 2 is placed on the second chip carrier platform 7 of the second chip carrier frame 4, wherein the second chip carrier frame 4 is also provided with two antenna soldering Po...
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