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Radiation-resistant fault-protected storage device and radiation-resistant fault-protected method thereof

A storage device and fault protection technology, applied in static memory, instruments, etc., can solve the problem of increasing chip cost

Active Publication Date: 2011-12-28
HARBIN INST OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] The present invention does not solve the multi-bit inversion that occurs in the existing storage array, but also can suppress the single-event transient effect that occurs in combination circuits such as encoders and decoders, and the existing EG-LDPC code requires more redundant bits. The storage of encoded information brings huge area overhead and increases the cost of the chip; and a radiation-resistant fault-protected storage device and its radiation-resistant fault protection method are proposed

Method used

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  • Radiation-resistant fault-protected storage device and radiation-resistant fault-protected method thereof
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  • Radiation-resistant fault-protected storage device and radiation-resistant fault-protected method thereof

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specific Embodiment approach 1

[0029] Specific embodiment one: combination figure 2 To explain this embodiment, the radiation failure protection type storage device described in this embodiment includes a mixed code encoding component 2 and a mixed code decoding component 3; the mixed code encoding component 2 is composed of an EG-LDPC code encoding module 2- 1 and Hamming code encoding module 2-2; the information encoding data input terminal of EG-LDPC encoding module 2-1 and the information encoding data input terminal of Hamming code encoding module 2-2 are simultaneously connected to the external information data output terminal; EG -The EG-LDPC code encoding data output terminal of the LDPC code encoding module 2-1 is connected to the EG-LDPC code encoding data input terminal of the storage array module 1; the Hamming code encoding data output terminal of the Hamming code encoding module 2-2 is connected to the storage array The Hamming code encoding data input terminal of module 1 is connected; the mix...

specific Embodiment approach 2

[0035] Specific implementation manner 2: The radiation failure protection method of the radiation protection failure protection type storage device described in the specific implementation manner 1 is composed of the following steps:

[0036] Step 1: Select the EG-LDPC code with the code word (n1, k1) and the Hamming code with the code word (n2, k2) according to the data width N of the memory that needs to be reinforced; where n1 and k1 are respectively the EG-LDPC code Code length and data width, n2 and k2 are the code length and data width of Hamming code respectively;

[0037] Step 2: Divide the EG-LDPC code with code length n1 selected in step 1 into M parts, the value of M is equal to the code length n2 of the Hamming code, and the length of each part of the M parts is at least 2 bits ;

[0038] Step 3: Insert the Hamming code with a code length of n2 evenly into the interval of the M parts of the EG-LDPC code, so that each byte of the Hamming code is physically separated; if t...

specific Embodiment approach 3

[0052] Specific embodiment three: This embodiment is different from the specific embodiment two in that a codeword is defined in the form of (n, k, t), where n is the code length, k is the information bit, and t represents the error correction capability. The EG-LDPC code can provide strong error correction capabilities for the data bits usually used in the storage array module 1, but it needs to be realized through double redundancy and multi-step decoding, which will bring too much to the entire storage array module 1. The area and delay overhead. In addition, an excessively high error correction capability (for example, 15 bits) is not necessary for the normal radiation environment. Mixed code reinforcement scheme

[0053] EG-LDPC code

[0054] Table I shows the comparison between the reinforcement scheme of the hybrid code and the reinforcement scheme of the EG-LDPC code. The first line in the table is the reinforcement scheme of the EG-LDPC code, the second and third li...

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Abstract

The invention discloses an anti-radiation fault-secure type memory device, and an anti-radiation fault-secure method thereof, and relates to an anti-radiation fault-secure type memory device, and a protection method thereof. In the prior art, multiple-bit upsets exist in the existing memory array; single event transient effects exist in an encoder, a decoder and other combinational circuits; EG-LDPC codes require a plurality of redundant bits to store encoded information so as to increase large area overhead and increase the chip cost. A purpose of the present invention is to solve the problems in the prior art. The anti-radiation fault-secure method comprises: 1, selecting the EG-LDPC codes and the Hamming codes; 2, dividing the EG-LDPC codes into M parts; 3, uniformly inserting the Hamming codes into the intervals of the M parts; 4, adopting a constraint algorithm to ensure the fault-secure characteristic of the mixed codes. The device has characteristics of low area and delay overhead, and can be applicable for synchronously inhibiting the multiple-bit upsets in the memory array and the single event transient effects in the encoder, the decoder and other combinational circuits.

Description

Technical field [0001] The invention relates to an anti-failure protection type storage device and a protection method thereof. Background technique [0002] As the size of the integration process continues to decrease, integrated circuits are becoming more and more sensitive to the space radiation environment and ground noise environment, and the normal working state of the circuit is seriously affected. Error Correction Code (ECC) is a common method for correcting faults in memory. However, as the distance between adjacent cells in the memory continues to shrink, the probability of multi-bit flipping caused by a radiation event has greatly increased; at the same time, since the ECC circuit needs to be composed of an encoder and a decoder, these combined circuits will be exposed to radiation. The impact of single event transient effects. Therefore, there is a need for a more effective memory fault protection (Fault-Secure) reinforcement technology, which can not only correct m...

Claims

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Application Information

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IPC IPC(8): G11C29/42
Inventor 肖立伊祝名付方发周彬陈达燕
Owner HARBIN INST OF TECH