Characterization method for parasitical bipolar junction transistor of MOS (metal oxide semiconductor) transistor

A technology of MOS transistor and bipolar transistor, which is applied in the field of characteristic characterization of parasitic BJT, can solve the problems of complicated testing process, and achieve the effect of simplifying the testing process.

Active Publication Date: 2012-01-18

SHANGHAI HUAHONG GRACE SEMICON MFG CORP

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Problems solved by technology

However, when testing the base current, the testing device needs to be in contact...

Abstract

The invention relates to a characterization method for a parasitical bipolar junction transistor of a MOS (metal oxide semiconductor) transistor. The method comprises the following steps: measuring a leakage current Id of the MOS transistor; measuring a gate induced drain leakage current Igidl of the MOS transistor; measuring a voltage Vds between a source electrode and a drain electrode of the MOS transistor, namely a voltage Vce between an emitting electrode and a collecting electrode of the parasitical bipolar junction transistor; according to the measured leakage current Id and the measured gate induced drain leakage current Igidl, calculating a current gain coefficient beta of the parasitical bipolar junction transistor by using a formula: Id = (1+beta) Igidl; and generating a fit function of the current gain coefficient beta of the parasitical bipolar junction transistor and the voltage Vce between the emitting electrode and the collecting electrode of the parasitical bipolar junction transistor. By using the testing method disclosed by the invention, an operation of contacting a body area of the MOS transistor can be omitted, and the test process is simple.

Application Domain

Individual semiconductor device testing

Technology Topic

Oxide semiconductorGain coefficient +5

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[0020] The test method of the present invention calculates the current gain coefficient β of the parasitic bipolar transistor in the MOS transistor by measuring the gate-induced drain leakage current Igidl of the MOS transistor, thereby generating a current gain coefficient β between the source and drain of the MOS transistor The voltage Vds, which is a fitting function of the voltage Vce between the emitter and collector of the parasitic bipolar transistor, does not need to contact the body region of the MOS transistor. In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings.

[0021] See image 3 , image 3 It is a flowchart of the test method of the present invention. Preferably, the MOS transistor is a MOS transistor with a lateral SOI structure, and the parasitic bipolar transistor of the MOS transistor is an NPN bipolar transistor. The test method of the present invention includes the following steps:

[0022] Measure the leakage current Id of the MOS transistor.

[0023] The gate-induced drain leakage current Igidl of the MOS transistor is measured.

[0024] Measure the voltage Vds between the source and drain of the MOS transistor, that is, the voltage Vce between the emitter and the collector of the parasitic bipolar transistor.

[0025] According to the measured leakage current Id and the gate-induced drain leakage current Igidl, the current gain coefficient β of the parasitic bipolar transistor is calculated by using Id=(1+β)Igidl.

[0026] Change the voltage Vds between the source and drain of the MOS transistor, that is, the voltage Vce between the emitter and the collector of the parasitic bipolar transistor, thereby changing the leakage current Id and gate-induced drain leakage of the MOS transistor. For the currents Igidl and Vds, the current gain coefficient β corresponding to the source-drain voltage Vds is calculated. According to the similar principle, multiple sets of corresponding data of Vce and β are obtained. Preferably, the measured voltage Vds between the source and drain of the MOS transistor, that is, the voltage Vce between the emitter and the collector of the parasitic bipolar transistor, ranges from 1.2V to 2.0V; The test interval of the voltage Vds between the source and drain, that is, the voltage Vce between the emitter and the collector of the parasitic bipolar transistor, is 0.1V.

[0027] Generate the current gain coefficient β of the parasitic bipolar transistor and the voltage Vds between the source and drain of the MOS transistor, that is, the analog of the voltage Vce between the emitter and collector of the parasitic bipolar transistor. 合 function.

[0028] Specifically, the corresponding data of Vce and β obtained by the above method are shown in Table 1:

[0029] Vce(V)

[0030] Table 1

[0031] The relationship between the gate-induced drain leakage current Igidl of a MOS transistor and the channel length of the MOS transistor, such as Figure 4 Shown. Among them, curve 31 and curve 32 respectively represent the measured relationship between Igidl and Vds when the gate-source voltage of the MOS transistor is Vgs=-1V, the channel width w=100μm, and the channel length is 0.13μm and 10μm. As can be seen from the figure, when Vds is greater than 1.2V, the Igidl of the long-channel MOS transistor and the short-channel MOS transistor are basically the same.

[0032] The relationship between the leakage current Id of the MOS transistor and the channel length of the MOS transistor, such as Figure 5 Shown. Among them, the curve 41, the curve 42, the curve 43, and the curve 44 respectively indicate that the channel length is 20 μm, 1.2 μm, 0.5 μm, 0.18 when the gate-source voltage of the MOS transistor is Vgs=-1V and the channel width w=20 μm. In μm, a graph of the relationship between Id and Vds is measured. It can be seen from the figure that under the same condition of Vds, Id decreases with the increase of the channel length of the MOS transistor. Therefore, the current gain coefficient β of the parasitic bipolar transistor of the MOS transistor decreases as the channel length increases.

[0033] Compared with the prior art, the test method of the present invention calculates the current gain coefficient β of the parasitic bipolar transistor in the MOS transistor by measuring the gate-induced drain leakage current Igidl of the MOS transistor, thereby generating the current gain coefficient β and the MOS transistor's current gain coefficient β. The voltage Vds between the source and drain, that is, the fitting function of the voltage Vce between the emitter and the collector of the parasitic bipolar transistor, does not need to contact the body region of the MOS transistor, thus simplifying the test process, and The invented test method has high accuracy.

[0034] Many widely different embodiments can be constructed without departing from the spirit and scope of the present invention. It should be understood that, except as defined by the appended claims, the present invention is not limited to the specific embodiments described in the specification.

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Classification and recommendation of technical efficacy words

The testing process is simple

Characterization method for parasitical bipolar junction transistor of MOS (metal oxide semiconductor) transistor

A technology of MOS transistor and bipolar transistor, which is applied in the field of characteristic characterization of parasitic BJT, can solve the problems of complicated testing process, and achieve the effect of simplifying the testing process.

AI-Extracted Technical Summary

Problems solved by technology

Abstract

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Examples

Example Embodiment

PUM

Description & Claims & Application Information

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