Power device structure capable of improving safety operation region (SOA) capacity and manufacturing method
A technology for power devices and SOA, applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as decreased effect, impact on device area, impact on device performance, etc., to improve SOA capability, reduce manufacturing costs, and reduce Effect of Cell Area
Active Publication Date: 2012-04-11
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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And deep p+body, n+source will be wide during the thermal process, especially deep p+body requires very deep, which means that the width will also be large, so it is necessary to leave a lot of space in the design to prevent The diffusion of deep p+body to n+source greatly affects the device area and also has a certain impact on device performance
[0005] At the same time, the introduction of the p+ buried layer is not very convenient, especially in the case of using deep p+body, it is difficult to control the depth and horizontal direction of the p+ buried layer, once the p+ buried layer is too deep or too shallow, or does not enclose the n+ source area, its effect will be greatly reduced
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[0027] like figure 1 , as shown in Figure 3, this patent takes the first type semiconductor as n and the second type semiconductor as p as an example
[0028] 1) Select an n-type substrate to grow SIO2 and polysilicon gate. The thickness of SiO2 is 10A-2000A, and the thickness of polysilicon gate is 500A-2um. It depends on the Vt, Ion, gate resistance and other requirements of the MOS device. A hard mask layer is grown on the polysilicon gate, in this case, it is SiN, and the side wall is SiO2, so as to ensure that the two materials are different and have an etching selectivity ratio. The thickness of the hard mask layer is 200A-5um.
[0029] 2) Photolithography and etching to generate gate patterns.
[0030] 3) Use oblique rotation implantation to perform p body implantation. The doping can be B or BF, and the body concentration is 1e12-1e20atom / em3. After completion, annealing is performed at a temperature of 650C-1300C and a time of 1H-100H, depending on the performance ...
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The invention discloses a power device structure capable of improving safety operation region (SOA) capacity, and a manufacturing method thereof. The power device is provided with a high-voltage-resistant first semiconductor substrate region, and a second semiconductor body region and a first semiconductor active region on the first semiconductor substrate region; a drain region is led out of a back; the front surface of a silicon wafer is provided with a groove which is embedded into a body and is filled with second semiconductor polycrystalline silicon directly connected with a substrate; a side wall is connected with the active region and a body region; a second semiconductor region which is arranged below the active region is separated from the body region, and the concentration of the second semiconductor region is higher than that of the body region; and the depth of the active region embedded into the groove edge is consistent with the concentration and the depth of other regions in the horizontal direction, and an obvious cylindrical surface distribution structure formed by dispersing does not exist. The power device structure can reduce a cellar area, improve SOA capacity and reduce manufacturing cost.
Description
technical field [0001] The invention relates to a power device structure and a manufacturing method in the field of microelectronic chip manufacturing Background technique [0002] For power components, in addition to the normal working area, there are two areas that are prone to failure, that is, when the device is turned on and when it is turned off. At this time, because the response speed of power devices is usually slow, the current increase or decrease lags behind the change of voltage, so there will be a large voltage and large current injection at the moment of turning on or off, and the device itself must be responsible for it. A certain resistance ability will not burn the device during the turn-on or turn-off time. This ability is usually called SOA (Safety Operation Area). The SOA capability of the device directly restricts the maximum breakdown voltage, operating current and switching speed of the device. [0003] like figure 2 As shown, the essence of improv...
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Login to View More IPC IPC(8): H01L29/06H01L29/36H01L21/265H01L21/336
Inventor 王雷
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP