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Radio frequency identification (RFID) chip structure and test method for reducing test crosstalk

A chip and test pressure technology, applied in the field of testing to reduce test crosstalk, can solve the problems of test crosstalk, instability of multiple test objects at the same time, and achieve the effect of improving efficiency, reducing test time cost, and reducing test cost.

Active Publication Date: 2012-07-04
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In order to further solve the above-mentioned technical problems, the present invention aims at the test crosstalk problem caused by the second reason, and proposes an RFID chip structure and a test method that can reduce this type of crosstalk, in order to solve the problems faced in the wafer level test of the RFID chip. Unstable problem with multiple test subjects

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  • Radio frequency identification (RFID) chip structure and test method for reducing test crosstalk
  • Radio frequency identification (RFID) chip structure and test method for reducing test crosstalk
  • Radio frequency identification (RFID) chip structure and test method for reducing test crosstalk

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Embodiment Construction

[0017] In order to make the purpose, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0018] figure 2 Shown is an RFID chip layout design without the use of the present invention, which has two antenna terminals ANT1 and ANT2. image 3 Shown are two adjacent chips of the present invention, chip A and chip B, and it except having original device structure, as RF antenna terminal (antenna terminal test pad) ANT1 and ANT2, MOS tube etc., also design adds some At least one ground terminal connected to the silicon substrate. In this example, a P-type wafer substrate is used as an example to lead out a ground terminal. Figure 4 Shown is the layout design of the RFID chip using the present invention. Each chip takes two ground terminals as an example, and the terminals in each place lead to test pads 1 and 2...

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Abstract

The invention discloses a radio frequency identification (RFID) chip structure for reducing test crosstalk. Except conventional radio frequency antenna terminals are arranged in a RFID chip, at least one ground terminal connected with a silicon substrate is additionally arranged in the RFID chip. A test pressure welding point guided out of the ground terminal serves as a reference ground test pressure welding point. The invention further discloses a test method for reducing the test crosstalk and corresponding to the chip structure. The test pressure welding point of the ground terminal is in connection with a signal reference ground of a test system through a probe card in a wafer-level test of the RFID chip, so that reference ground level of the chip of a tested object can be consistent with the reference ground of the signal of the test system, then the crosstalk caused by fluctuation of the reference ground level is reduced, and test stability is improved.

Description

technical field [0001] The invention relates to an RFID chip structure, in particular to an RFID chip structure capable of reducing test crosstalk in wafer-level testing. The invention also relates to a test method for reducing test crosstalk. Background technique [0002] When testing the RF function of the chip in the wafer-level test of the RFID chip, in order to improve the test efficiency and reduce the test cost, multiple test objects will be tested at the same time, that is, multiple test objects are tested at the same time, such as figure 1 Shown is the definition of adjacent test objects when multiple test objects are tested at the same time. In the figure, the use of 16 simultaneous test probe cards is used as an example to show the matrix of adjacent test objects. If chip 12 is tested, the The other 15 chips were adjacent test objects. Due to the characteristics of RFID chip testing, the process of testing multiple test objects at the same time will cause crosst...

Claims

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Application Information

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IPC IPC(8): G06K19/077G01R31/26G01R31/27
Inventor 曾志敏
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP