Field programmable gate array (FPGA)-driving-based cascaded multilevel converter

Abstract

The invention discloses a field programmable gate array (FPGA)-driving-generation-based cascaded multilevel converter, which comprises a frequency conversion controller and an FPGA connected with the frequency conversion controller. The FPGA comprises a bus interface module, a frequency division module, a sinusoidal wave generation module, a carrier generation module and a driving signal generation module. A phase shift carrier sinusoidal pulse width modulation (SPWM) technology is adopted, and N carriers are compared with a three-phase modulated wave respectively, so that N bi-level three-phase SPWM signals are obtained. The characteristics of the FPGA are fully utilized, and a data storage circuit, an address generation circuit, a control circuit and the like which are required by the generation of the SPWM signals are all integrated into a chip, so that a frequency conversion system has a high integration level, low cost and high reliability, and comprises a few parts; and a device resource utilization rate is high, switching frequency is reduced, a sideband harmonic order is increased, and the frequency conversion system is low in switching loss and low in harmonic content.

Description

technical field [0001] The invention belongs to the technical field of frequency conversion control, and in particular relates to a cascaded multilevel frequency converter based on FPGA (Field Programmable Gate Array) drive generation. Background technique [0002] The application of AC frequency conversion technology in medium and high-power speed control devices has become one of the hot spots of AC speed control systems at home and abroad. Traditional dual-level inverters have the following problems in high-voltage and high-power applications: (1) High switching frequency and large switching loss; (2) The required transformer is expensive, large in size, and high in energy consumption; (3) The device used Series connection requires complex dynamic voltage equalization circuit, etc. The multi-level frequency converter adopts a new circuit topology structure. While reducing the output transformer and dynamic voltage equalizing circuit, it only needs a low switching frequen...

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Problems solved by technology

Traditional dual-level inverters have the following problems in high-voltage and high-power applications: (1) High switching frequency and large switching loss; (2) The required transformer is expensive, large in size, and high in energy consumption; (3) The device used Series connection requires complex dynamic voltage equalization circuit, etc.

In practical applications, if the function is powerful, the DSP chip TMS320C2812 suitable for motor control can only provide 12 pulses at most; therefore, the limited number of independent SPWM signals limits the number of levels of the multi-level inverter, and also limits the frequency of the inverter. performance improvement

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