Processing method for power down and abnormal writing of solid state disc and system

A technology of solid-state hard disk and processing method, which is applied in the direction of data processing power supply, protection of stored content to prevent loss, etc., and can solve problems such as damage

Active Publication Date: 2012-07-18
RAMAXEL TECH SHENZHEN
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  • Description
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  • Application Information

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Problems solved by technology

In this way, on the basis of not increasing the cost and complexity of hardware design, it not only solves the problem of data corruption in low-order pages caused by abnorm

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  • Processing method for power down and abnormal writing of solid state disc and system
  • Processing method for power down and abnormal writing of solid state disc and system
  • Processing method for power down and abnormal writing of solid state disc and system

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Embodiment Construction

[0086] Specific embodiments of the present invention are given below, and the present invention is further described in conjunction with the accompanying drawings.

[0087] Such as Figure 9 As shown, the present invention discloses a method for handling power failure and write exception of a solid-state hard disk, including the following steps: Step 100, scan the flash memory array, obtain stored management information, and initialize after extracting the management information to generate multiple mapping areas, dynamically Adjust the mapping area to manage the conversion of MLC to SLC.

[0088] The step 100 also includes:

[0089] Step 110, by dynamically converting a part of MLC to SLC, the system will use this part of the area as the first mapping area, and use the remaining part of the storage area as the second mapping area, wherein the size of the first mapping area is based on the additional provision area and The size of the second mapping area is dynamically adjus...

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Abstract

A processing method for power down and abnormal writing of a solid state disc comprises the steps of step 100, scanning a flash array, obtaining stored management information, performing initialization after extracting the management information, generating a plurality of mapping areas, dynamically adjusting the mapping areas, and managing the conversion between a multi level cell (MLC) to a single level cell (SLC); step 200, performing data reading and writing, during reading, finding a corresponding physical address through the two mapping areas, and reading the data on a flash memory; step 300, when the data is written, if finding a first mapping area already has no spare low level page, then starting waste page recovery management and abrasion balance management, after the abrasion balance management preferably recovers the waste page according to information in a mapping list of the first mapping area and then distributes the spare page, writing the data into the first mapping area; and step 400, when the conditions of power down or abnormal writing happen, enabling the plurality of mapping areas to perform corresponding operations to recover the data.

Description

technical field [0001] The invention relates to the field of solid-state hard disks, in particular to a method and system for handling power-off and writing exceptions of solid-state hard disks. Background technique [0002] With the extensive application of MLC (multi level cell) NAND FLASH, the NAND FLASH used in solid-state hard disks is also mainly selected from MLC NAND FLASH. For most MLC NAND FLASH, it has remarkable characteristics: namely, as attached figure 1 , the two bits in the same unit are allocated in two different pages, that is, the upper page and the lower page, so that there is a strong coupling between the two pages. The write operation will have two phases: low page write (1 st round) and upper page writes (2 nd round), if the high-order page write operation is abnormal, the data in the low-order page will also be destroyed. On the contrary, if the low-order page write operation is abnormal, it will not affect the high-order page. [0003] At pres...

Claims

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Application Information

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IPC IPC(8): G06F12/16G06F1/30
Inventor 方浩俊
Owner RAMAXEL TECH SHENZHEN
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