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Method and device for repairing memory chip, and memory chip

A memory chip and backup storage technology, applied in static memory, instruments, etc., can solve problems such as unusable, unreachable, and difficult to repair, and achieve the effect of reducing the probability of damage

Active Publication Date: 2015-05-27
GIGADEVICE SEMICON (BEIJING) INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, for the general design of non-volatile memory, the erase operation can only be performed in the form of a whole piece, a whole block (block) or a sector (sector), causing the erase operation of the existing repair method to be aimed at normal cell arrays and The block where the backup cell is located; in this way, if many times of erase operations are performed before the repair is implemented, it will cause serious over-erase (over erase) phenomenon in the backup cell, thereby increasing the damage probability of the backup cell. These backup cells have been broken and cannot be used, which brings difficulties to the repair of MCP
[0006] For the over erase phenomenon of the backup cell, there are some repair methods that avoid performing the erase operation before realizing the repair, that is, reducing the number of erase operations will not only fail to achieve the desired effect, but also greatly limit the flexibility and repair ability

Method used

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  • Method and device for repairing memory chip, and memory chip
  • Method and device for repairing memory chip, and memory chip
  • Method and device for repairing memory chip, and memory chip

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Embodiment Construction

[0064] In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0065] One of the core concepts of the embodiments of the present invention is to add a second interface in the memory chip, and the addressing of the backup cell is performed by the second interface; in this way, after the erasing operation is successful, the backup cell can be checked through the second interface Whether it is in the over-erased state, and correct the backup cells in the over-erased state through soft programming operations, so as to prevent these backup cells from remaining in the over-erased state, thereby reducing the probability of damage to the backup cells.

[0066] refer to figure 1 , which shows a flow chart of Embodiment 1 of a method for repairing a memory chip according to the present invention, which...

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PUM

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Abstract

The invention provides a method and a device for repairing a memory chip, and the memory chip. The method specifically comprises the following steps of: an address matching step: via a first interface, executing the address matching operation on a normal memory cell, wherein the address matching operation further comprises the step of executing an erasing operation on a target block where the normal memory cell is; an erasing checking step: via a second interface, checking whether a backup memory cell is in an over-erasing state; a software programming step: via the second interface, executing the software programming operation on the backup memory cell which is in the over-erasing state; a repairing step: substituting the normal memory cell corresponding to the address in the current address matching operation with the backup memory cell; a first configuration step: establishing a first configuration in which the first interface is opened and the second interface is closed; and a second configuration step: establishing a second configuration in which the first interface is closed and the second interface is opened. According to the method, the probability of damaging the backup cell can be reduced while the repairing flexibility and the repairing capability are kept.

Description

technical field [0001] The invention relates to the technical field of semiconductor chips, in particular to a method and device for repairing a memory chip, and a memory chip. Background technique [0002] At present, with the trend of increasing multimedia applications in mobile phones, the amount of memory capacity has become one of the key factors for adding various multimedia functions to the next generation mobile phone. Common mobile phone memory mainly includes NOR Flash (or non-flash memory), NAND Flash (and non-flash memory), Low Power SRAM (low power random access memory) and Pseudo SRAM (virtual static random access memory). However, due to the trend of mobile phones becoming thinner and smaller, the space available for memory chips in system products is getting smaller and smaller. Therefore, mobile phone memory NOR Flash, NAND Flash, Low Power SRAM and Pseudo SRAM are stacked and packaged into a multi-chip package (MCP , Multi-Chip Packaging) technology is wid...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/44
Inventor 苏志强舒清明
Owner GIGADEVICE SEMICON (BEIJING) INC
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