Semiconductor bond pad structure and integrated circuit

Abstract

The invention provides a semiconductor bond pad structure and an integrated circuit. The semiconductor bond pad structure comprises a central part and a periphery part, wherein the central part is an exposed metal thin film; a passivating layer is arranged on the surface of the periphery part and through holes are arranged in the periphery part; grooves are arranged at the periphery of the central part; and a groove tungsten wall is arranged at the periphery of each groove in the central part. According to the structure, the grooves are retained by the groove tungsten walls, so that fluorine volatilized from the lower layer is kept away and prevented from corroding the surface of upper layer metal and consequently circuit corrosion is avoided. Besides, according to the structure provided by the embodiment of the invention, each of the grooves is surrounded by the groove tungsten wall, so that water vapour is prevented by the groove tungsten walls from entering the lower layer structure and therefore the waterproof property is improved..

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, more specifically, the invention relates to a semiconductor bonding pad structure and an integrated circuit using the semiconductor bonding pad structure. Background technique [0002] Semiconductor packaging is an important process in the field of semiconductor manufacturing. Semiconductor packaging refers to the process of processing the tested wafers according to the product model and functional requirements to obtain independent chips. The packaging process is: the wafer from the wafer front-end process is cut into small chips after the dicing process, and then the cut chips are attached to the small islands of the corresponding substrate (lead frame) frame with adhesive , and then use ultra-fine metal (gold, tin, copper, aluminum, etc.) wires or conductive resin to connect the semiconductor bonding pad (Bond Pad) of the chip to the corresponding pin of the substrate to form the re...

AI Technical Summary

Problems solved by technology

[0007] but, figure 2 The disadvantage of the semiconductor bond pad structure 200 shown is that after the trench (groove B) is made, the fluorine in the lower layer will volatilize and corrode the upper metal surface, causing circuit corrosion and other failures, and moisture will pass through the groove B into the underlying circuit layers, reducing the useful life of the circuit

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