Booth multiplier
A multiplier and multiplier technology, which is used in instruments, electrical digital data processing, digital data processing components, etc., to achieve the effect of simple circuit, good performance, and improved calculation speed
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[0030] Example 1
[0031] According to the IEEE 754-1985 / 2008 standard, the binary floating-point number v can be represented by three parameters, namely the symbol S, the mantissa F, and the order code (also called exponent) E, and its representation is:
[0032] v=(-1) S ·2 E-bias ·1.F (1)
[0033] The sign bit S∈{0,1}, when S is 0, it means that the floating-point number is non-negative, and when it is 1, it corresponds to a negative number. Its binary representation is as figure 1 Shown. For binary single precision floating point number x 1 And x 2 , Their binary floating point format is like figure 2 As shown, where bias=2 8 -1=127, v=(-1) s ·2 E-127 ×1.F; their product is shown in formula (2).
[0034] x 1 · x 2 = ( - 1 ) S 1 + S 2 X 2 θ 1 + θ 2 - 127 X [ 1 . f 1 X 1 . f 2 ] - - - ( 2 )
[0035] among them x 1 · = ( - 1 ) S 1 X 2...
Example Embodiment
[0060] Example 2
[0061] The Booth multiplier of this embodiment, except that the Booth decoding circuit uses Picture 9 Except for the Booth decoding circuit shown, other features are the same as those in the first embodiment. In this example, the adopted decoding circuit ( Picture 9 (Shown) is implemented according to formula (6). The difference from Example 1 is that in the code implementation process, formula (6) is not transformed.
Example Embodiment
[0062] Example 3
[0063] The Booth multiplier of this embodiment has the same features as the first embodiment except that the multiplier and multiplicand judgment modules are added. The multiplier and multiplicand judging module is used to judge whether the multiplier and the multiplicand are zero; if at least one of the multiplier and the multiplicand is zero, the Booth encoding circuit, Booth decoding circuit, compressor and The carry reserved adder.
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