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A matrix eid bus circuit

A bus circuit and matrix technology, applied in the field of optical communication, can solve the problems of unusable single bus architecture, limited number of chips, error-prone reading and writing, etc., and achieve the effect of low power consumption, stable control signal and reliable control

Active Publication Date: 2014-10-29
FENGHUO COMM SCI & TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Using the existing single-bus architecture, when reading and writing eID chips, the number of chips that can be connected to the bus is limited, only 3 to 5 can be connected, and it is easy to make mistakes when reading and writing
When the number of chips increases, the existing single-bus architecture cannot be used, and the expected effect cannot be achieved

Method used

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  • A matrix eid bus circuit
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Embodiment Construction

[0024] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0025] see figure 1 As shown, a matrixed eID bus circuit provided by an embodiment of the present invention includes a control unit and several electronic label units, the control unit includes a CPU, the electronic label unit includes several eID chips, and the data buses eID-1 and eID -2...eID-M are respectively connected to the I / O (Input / Output, input and output) ports of the 1st to M eID chips on the electronic label unit 1, electronic label unit 2...electronic label unit N, forming a group In the horizontal data bus architecture, both M and N are integers greater than 2. The control buses COM-1, COM-2~COM-N drawn from the control unit are respectively connected to the ground terminals of the 1st~M eID chips on the electronic label unit 1, electronic label unit 2...on the electronic label unit N, forming a longitudinal control ...

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Abstract

The invention closes a matrix eID bus circuit which comprises a control unit and a plurality of electric tag units, wherein data buses eID-1, eID-2,... and eID-M led out from the control unit are respectively connected with I / O ports of 1-M eID chips respectively on electric tag units from 1-N, so as to form a transverse bus frame, wherein the M as well as the N is an integer larger than 2; and control buses COM-1,COM-2... And COM-N led out form the control unit are respectively with grounded terminals of the 1-M eID chips respectively on electric tag units from 1-N, so as to form a longitudinal bus frame; and the transverse bus frame and the longitudinal bus frame together form the matrix eID bus circuit. According to the invention, the bus resource is saved, hundreds of eID chips can be accurately read at the same time, and the number of the eID chips on one bus is not limited.

Description

technical field [0001] The invention relates to the field of optical communication, in particular to a matrixed eID bus circuit. Background technique [0002] Due to the wide application of FTTH (Fiber To The Home, fiber to the home), the global ODN (Optical Distribution Network, optical distribution network) ushered in explosive growth, and the global FTTH construction boom has further promoted the development of the ODN market. Since FTTH mainly uses PON (Passive Optical Network, Passive Optical Network) technology, it will branch an OLT (Optical Line Tterminal, Optical Line Terminal) to tens of thousands of ONU (Optical Network Unit, Optical Network Unit) , which makes the user end of the ODN network generate a large number of optical fiber lines, which need to be dispatched, maintained and managed. [0003] The early optical cable lines were basically point-to-point lines, and the management was relatively easy. However, the ODN network serving FTTH is a point-to-multip...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04Q11/00H04L12/40
Inventor 陈求福雷非王阳易熳
Owner FENGHUO COMM SCI & TECH CO LTD
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