Radio frequency LDMOS device with buried layer below drain electrode

Abstract

The invention discloses a radio frequency LDMOS (Laterally Diffused Metal Oxide Semiconductor) device with a buried layer below a drain electrode which is improved at two aspects aiming at traditional radio frequency LDMOS breakdown voltage, that is grid electrode plates (171) and (172) are stretched and overlapped with an STI (142) and an STI (143); and the buried layer is rightly led below the drain electrode (153). The grid electrode plates are stretched onto the STIs, thus limitation of electric field peak on the breakdown voltage, wherein the electric field peak is led by the grid electrode plates; owing to the leading of the buried layer (11), the radio frequency LDMOS device is provided with n+n-p-p+ structure in the longitudinal direction, which facilitates exhaustion of a drift region rightly below the drain electrode (153), so that the longitudinal electric field is equalized, and breakdown voltage of the radio frequency LDMOS device is improved. In addition, the buried layer (11) is located outside the drift region, is far from a current-carrying subchannel, so that the frequency characteristic of the radio frequency LDMOS device is hardly affected. Therefore, the structure of the radio frequency LDMOS device is particularly suitable for a radio frequency power device, can effectively improve performance of a radio frequency power amplifier (PA).

Description

technical field [0001] The invention belongs to the technology of high-voltage power integrated circuits, and in particular relates to a radio frequency LDMOS (laterally diffused MOS transistor) device with a buried layer under the drain. Background technique [0002] see figure 1 , which is an existing LDMOS device with the well as the body and the drift region (that is, for n-type LDMOS, the p well is used as the body region, and the n well is used as the drift region; for the p-type LDMOS, the n well is used as the body region, p-well as the drift region.) Schematic cross-section. The figure shows an LDMOS device structure with two interdigitated fingers, that is, the two LDMOS devices share a drain 153; 19 is a deep n well, which is only used for p-type LDMOS. [0003] For n-type LDMOS, 121 and 123 are p-wells, and 122 is an n-well. The n-well and the p-well are located at a deeper position from the surface of the device to the substrate 10, and the p-well and the n-w...

AI Technical Summary

Problems solved by technology

This will not only cause the LDMOS to break down early and reduce the breakdown voltage of the device; but also due to the hot carrier effect, the hot carrier will bombard the gate oxide layer and even cause the device to fail

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